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Partno	Mfg	Dc	Qty	Available	Descript
74LX1G07CTR	ST	N/a	7000	avai	LOW VOLTAGE SINGLE BUFFER/DRIVER (OPEN DRAIN)

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74LX1G07CTR
LOW VOLTAGE SINGLE BUFFER/DRIVER (OPEN DRAIN)
1/10October 2002 5V TOLERANT INPUTS HIGH SPEED:tPD =4.2ns (MAX.)at VCC=
3.3V LOW POWER DISSIPATION:
ICC =1μA(MAX.)at TA=25°C POWER DOWN PROTECTIONON INPUTS
AND OUTPUTS POWER DOWN PROTECTIONON INPUT OPERATING VOLTAGE RANGE:
VCC(OPR)= 1.65Vto 5.5V
(1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LX1G07isa low voltage CMOS SINGLE
BUFFER (OPEN DRAIN) fabricated with
sub-micron silicon gate and double-layer metal
wiringC2 MOS technology.
The internal circuitis composedof2 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protectionis providedon input and07V canbe acceptedon input withno regardto
the supply voltage. This device canbe usedto
interface5V to3V.
74LX1G07
SINGLE BUFFER/DRIVER (OPEN DRAIN)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LX1G07
2/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLEHigh Impedance
ABSOLUTE MAXIMUM RATINGS
AbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied.
74LX1G07
3/10
RECOMMENDED OPERATING CONDITIONS Truth Table guaranteed:1.2Vto3.6VVINfrom0.8Vto2VatVCC =3.0V SPECIFICATIONS
74LX1G07
4/10 ELECTRICAL CHARACTERISTICS
CAPACITIVE CHARACTERISTICSCPD isdefinedasthe valueoftheIC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load. (RefertoTest Circuit). Average operating currentcanbe obtainedbythe following equation. ICC(opr) =CPD xVCCxfIN +ICC
74LX1G07
5/10
TEST CIRCUIT =ZOUTof pulse generator (typically50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle)