74LVX74 ,Low Voltage Dual D-Type Positive Edge-Triggered Flip-FlopapplicationsInformation at the input is transferred to the outputs on the YAvailable in SOIC JEDEC, ..
74LVX74M ,Low Voltage Dual D-Type Positive Edge-Triggered Flip-FlopAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LVX74M ,Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flopapplications
74LVX74
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
TL/F/11606
74LVX74
Low
Voltage
Dual
D-Type
Positive
Edge-Triggered
Flip-Flop
January 1996
74LVX74
Low Voltage Dual D-Type
Positive Edge-Triggered Flip-Flop
General Description
The LVX74isa dual D-type flip-flop with Asynchronous
Clear andSet inputs and complementary(Q,Q) outputs.
Informationatthe inputis transferredtothe outputsonthe
positive edgeofthe clock pulse. Afterthe Clock Pulse input
threshold voltagehas been passed, theData inputis locked
out and information presentwillnotbe transferredtothe
outputs untilthe next rising edgeofthe Clock Pulse input.
Asynchronous Inputs:
LOW inputtoSD (Set) setsQto HIGH level
LOW inputtoCD (Clear) setsQto LOW level
ClearandSetare independentof clock
Simultaneous LOWonCDandSD makes bothQandQ
HIGH
Features Input voltage level translation from5Vto3V Idealforlow power/low noise 3.3V applications Availablein SOIC JEDEC, SOIC EIAJ and TSSOP
packages Guaranteed simultaneous switching noise level anddy-
namic threshold performance
Logic Symbols Connection Diagram
TL/F/11606–1 TL/F/11606–2
IEEE/IEC
TL/F/11606–4
PinAssignmentfor
SOICand TSSOP
TL/F/11606–3
Pin Names Description
D1,D2 Data Inputs
CP1,CP2 Clock Pulse Inputs
CD1,CD2 Direct Clear Inputs
SD1,SD2 DirectSet Inputs
Q1,Q1,Q2,Q2 Outputs
Truth Table (Each Half)
Inputs Outputs CD CP D Q Q X X H L X X L H X X H H L HH L L LL H L X Q0 Q0e LOW-to-HIGH Clock TransitionHe HIGH Voltage Level Q0(Q0)e PreviousQ(Q) before LOW-LeLOW VoltageLevel to-HIGH Transition ofClockXe Immaterial
SOIC JEDEC SOIC EIAJ TSSOP
Order Number 74LVX74M 74LVX74SJ 74LVX74MTC
74LVX74MX 74LVX74SJX 74LVX74MTCX
SeeNS M14A M14D MTC14Package Number
C1996National SemiconductorCorporation RRD-B30M17/Printed inU.S.A. http://
