74LVX14MX_NL ,Low Voltage Hex Inverter with Schmitt Trigger InputFeaturesThe LVX14 contains six inverter gates each with a Schmitt
74LVX14MX_NL
Low Voltage Hex Inverter with Schmitt Trigger Input
74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input March 1993 Revised February 2005 74LVX14 Low Voltage Hex Inverter with Schmitt Trigger Input General Description Features The LVX14 contains six inverter gates each with a SchmittInput voltage level translation from 5V to 3V trigger input. They are capable of transforming slowlyIdeal for low power/low noise 3.3V applications changing input signals into sharply defined, jitter-free out- Guaranteed simultaneous switching noise level and put signals. In addition, they have a greater noise margin dynamic threshold performance than conventional inverters. The LVX14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. Ordering Code: Package Order Number Package Description Number 74LVX14M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX14MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX14SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX14MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm (Note 1) Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. © 2005 DS011603
