74LVX00MTCX ,Low Voltage Quad 2-Input NAND GateFeaturesThe LVX00 contains four 2-input NAND gates. The inputs
74LVX00MTC-74LVX00MTCX-74LVX00MX
Low Voltage Quad 2-Input NAND Gate
74LVX00 Low Voltage Quad 2-Input NAND Gate February 1993 Revised February 2005 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputsInput voltage level translation from 5V to 3V tolerate voltages up to 7V allowing the interface of 5V sys-Ideal for low power/low noise 3.3V applications tems to 3V systems. Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Package Order Number Package Description Number 74LVX00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX00MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow (Note 1) 74LVX00SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX00MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide (Note 1) Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A , B Inputs n n O Outputs n © 2005 DS011551
