74LVTH543WMX ,Low Voltage Octal Registered Transceiver with 3-STATE OutputsFeaturesThe LVTH543 octal transceiver contains two sets of D-type
74LVTH543MTC-74LVTH543MTCX-74LVTH543WM-74LVTH543WMX
Low Voltage Octal Registered Transceiver with 3-STATE Outputs
74LVTH543 Low Voltage Octal Registered Transceiver with 3-STATE Outputs April 2000 Revised November 2000 74LVTH543 Low Voltage Octal Registered Transceiver with 3-STATE Outputs General Description Features The LVTH543 octal transceiver contains two sets of D-typeInput and output interface capability to systems at latches for temporary storage of data flowing in either 5V V CC direction. Separate Latch Enable and Output Enable inputs Bushold data inputs eliminate the need for external are provided for each register to permit independent con- pull-up resistors to hold unused inputs trol of inputting and outputting in either direction of data Live insertion/extraction permitted flow. Power Up/Down high impedance provides glitch-free The LVTH543 data inputs include bushold, eliminating the bus loading need for external pull-up resistors to hold unused inputs. Outputs source/sink −32 mA/+64 mA This octal registered transceiver is designed for low-volt- Functionally compatible with the 74 series 543 age (3.3V) V applications, but with the capability to pro- CC vide a TTL interface to a 5V environment. The LVTH543 isLatch-up performance exceeds 500 mA fabricated with an advanced BiCMOS technology toESD performance: achieve high speed operation similar to 5V ABT while Human-body model > 2000V maintaining a low power dissipation. Machine model > 200V Charged-device model > 1000V Ordering Code: Order Number Package Number Package Description 74LVTH543WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LVTH543MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Description OEAB, OEBA Output Enable Inputs LEAB, LEBA Latch Enable Inputs CEAB, CEBA Chip Enable Inputs A –A Side A Inputs or 0 7 3-STATE Outputs B –B Side B Inputs or 0 7 3-STATE Outputs © 2000 DS012448
