74LVTH322373 ,Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputsapplications, but with the capability to provide a TTL inter-Human-body model > 2000Vface to a 5V e ..
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74LVTH32245GX ,Low Voltage 32-Bit Transceiver with 3-STATE Outputsapplications, but with the capability to pro-CCMachine model > 200Vvide a TTL interface to a 5V env ..
74LVTH32374 ,Low Voltage 32-Bit D-Type Flip-Flop with 3-STATE Outputsapplications. The device is byte
74LVTH322373
Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and 25-Ohm Series Resistors in the Outputs
74LVT322373 • 74LVTH322373 Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and 25Ω Series Resistors in the Outputs May 2002 Revised May 2002 74LVT322373 74LVTH322373 Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and 25Ω Series Resistors in the Outputs General Description Features The LVT322373 and LVTH322373 contain thirty-two non-Input and output interface capability to systems at inverting latches with 3-STATE outputs and are intended 5V V CC for bus oriented applications. The device is byte controlled. Bushold data inputs eliminate the need for external The flip-flops appear transparent to the data when the pull-up resistors to hold unused inputs (74LVTH322373), Latch Enable (LE) is HIGH. When LE is LOW, the data that also available without bushold feature (74LVT322373) meets the setup time is latched. Data appears on the bus Live insertion/extraction permitted when the Output Enable (OE) is LOW. When OE is HIGH, Power Up/Down high impedance provides glitch-free the outputs are in a high impedance state. bus loading The LVTH322373 data inputs include bushold, eliminating Outputs include equivalent series resistance of 25Ω to the need for external pull-up resistors to hold unused make external termination resistors unnecessary and inputs. reduce overshoot and undershoot These latches are designed for low voltage (3.3V) V CC ESD performance: applications, but with the capability to provide a TTL inter- Human-body model > 2000V face to a 5V environment. The LVT322373 and LVTH322373 are fabricated with an advanced BiCMOS Machine model > 200V technology to achieve high speed operation similar to 5V Charged-device model > 1000V ABT while maintaining a low power dissipation. Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Ordering Code: Order Number Package Number Package Description 74LVT322373G BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Note 2) (Preliminary) 74LVTH322373G BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 1) (Note 2) Note 1: Ordering Code “G” indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2002 DS500742
