74LVTH16646MTD ,Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputsapplications, but with the capability to provide a TTLCCMachine model > 200Vinterface to a 5V envir ..
74LVTH16646MTD ,Low Voltage 16-Bit Transceiver/Register with 3-STATE OutputsFeaturesThe LVT16646 and LVTH16646 contains sixteen non-
74LVTH16646MEAX-74LVTH16646MTD
Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs
74LVT16646 • 74LVTH16646 Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs January 2000 Revised October 2001 74LVT16646 74LVTH16646 Low Voltage 16-Bit Transceiver/Register with 3-STATE Outputs General Description Features The LVT16646 and LVTH16646 contains sixteen non-Input and output interface capability to systems at inverting bidirectional registered bus transceivers providing 5V V CC multiplexed transmission of data directly from the input bus Bushold data inputs eliminate the need for external or from the internal storage registers. Each byte has sepa- pull-up resistors to hold unused inputs (74LVTH16646) rate control inputs which can be shorted together for full Also available without bushold feature (74LVT16646) 16-bit operation. The DIR inputs determine the direction of Live insertion/extraction permitted data flow through the device. The CPAB and CPBA inputs load data into the registers on the LOW-to-HIGH transitionPower Up/Down high impedance provides (see Functional Description). glitch-free bus loading The LVTH16646 data inputs include bushold, eliminatingOutputs source/sink −32 mA/+64 mA the need for external pull-up resistors to hold unusedLatch-up conforms to JEDEC JED78 inputs. ESD performance: These transceivers are designed for low-voltage (3.3V) Human-body model > 2000V V applications, but with the capability to provide a TTL CC Machine model > 200V interface to a 5V environment. The LVT16646 and Charged-device model > 1000V LVTH16646 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. Ordering Code: Order Number Package Number Package Description 74LVT16646MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Preliminary) 74LVT16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Preliminary) 74LVTH16646MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LVTH16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2001 DS012023
