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74LVTH16543DGGRE4-SN74LVTH16543-SN74LVTH16543DGGR-SN74LVTH16543DL-SN74LVTH16543DLR
3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
Dissipation Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation
Down to 2.7 V Ioff and Power-Up 3-State Support Hot
Insertion Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors Typical V OLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB
Layout Latch-Up Performance Exceeds 500 mA Per
JESD 17 ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
descriptionThe ’LVTH16543 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCC operation, but
with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two
8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB
or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches
in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present
at the output of the A latches. Data flow from B to A is similar but requires using the CEBA, LEBA, and OEBA
inputs.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1CEAB
GND
1A1
1A2CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6CC
2A7
2A8
GND
2CEAB
2LEAB
2OEAB
1CEBA
GND
1B1
1B2CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6CC
2B7
2B8
GND
2CEBA
2LEBA
2OEBA
