74LVQ273T Fast Delivery |IC PHOENIX CO.,LIMITED

74LVQ273T ,OCTAL D-TYPE FLIP FLOP WITH CLEARABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply Voltage -0.5 to +7 VCCV DC Input Voltag ..
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74LVQ273T
OCTAL D-TYPE FLIP FLOP WITH CLEAR
74LVQ273
OCTAL D-TYPE FLIP FLOP WITH CLEAR
February 1999 HIGH SPEED:
fMAX= 150MHz(TYP.)at VCC= 3.3V COMPATIBLEWITH TTL OUTPUT LOWPOWER DISSIPATION:
ICC =4 μA (MAX.)atTA =25oC LOWNOISE:
VOLP =0.4V (TYP.)at VCC =3.3V 75Ω TRANSMISSIONLINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 12mA(MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATIONDELAYS:
tPLH≅ tPHL OPERATINGVOLTAGERANGE:
VCC (OPR)= 2Vto 3.6V (1.2V DataRetention) PIN AND FUNCTION COMPATIBLE WITH SERIES273 IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The LVQ273isa low voltage CMOS OCTAL
D-TYPE FLIP FLOP WITH CLEAR fabricated
with sub-micron silicon gate and double-layer
metal wiringC2 MOS technology.Itis ideal for low
power and low noise 3.3Vapplications.
Information signals applied to D inputs are
transferedto theQ outputson the positive going
edgeof the clock pulse.
When the CLEAR inputsis held low, the Q
outputs are held low independentelyof the other
inputs. has better speed performanceat 3.3V than 5V
LS-TTL family combined with the true CMOS low
power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
(Micro Package)
(TSSOP Package)
ORDER CODES:
74LVQ273M 74LVQ273T
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
LOGIC DIAGRAM
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION CLEAR Asyncronous Master
Reset (Active LOW)5,6,9,
12, 15,16,toQ7 Flip-Flop Outputs4,7,8,
13, 14,17,toD7 Data Inputs CLOCK Clock Input
(LOW-to-HIGH, Edge-
Triggered) GND Ground (0V) VCC Positive Supply Voltage
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLEAR D CLOCK Q X X L CLEAR L H Qn NO CHANGE
X:Don’t Care
Thislogicdiagram hasnotbeusedtoesimate propagation delays
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage -0.5to+7 V DC Input Voltage -0.5to VCC+ 0.5 V DC Output Voltage -0.5to VCC+ 0.5 V
IIK DC Input Diode Current ±20 mA
IOK DC Output Diode Current ±20 mA DC Output Current ±50 mA
ICCor IGND DC VCCor Ground Current ± 400 mA
Tstg Storage Temperature -65to +150 oC Lead Temperature (10 sec) 300 oC
AbsoluteMaximumRatingsarethosevalues beyond whichdamage tothedevicemayoccur. Functionaloperationunderthese condition isnot implied.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
VCC Supply Voltage (note1) 2to3.6 V Input Voltage 0to VCC V Output Voltage 0to VCC V
Top Operating Temperature: -40to +85 oC
dt/dv Input Rise and Fall Time (VCC= 3V) (note2) 0to10 ns/V
1)TruthTableguaranteed: 1.2Vto3.6V
2)VINfrom0.8Vto2V
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SPECIFICATIONSSymbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
VIH High Level Input Voltage 3.0to
2.0 2.0 V
VIL Low Level Input Voltage 0.8 0.8 V
VOH High Level Output
Voltage
3.0 VI(*)=
VIHor
VIL
IO=-50 μA 2.9 2.99 2.9IO=-12 mA 2.58 2.48
IO=-24 mA 2.2
VOL Low Level Output
Voltage
3.0 VI(*)=
VIHor
VIL
IO=50μA 0.002 0.1 0.1IO=12 mA 0 0.36 0.44
IO=24 mA 0.55 Input Leakage Current 3.6 VI =VCCor GND ±0.1 ±1 μA
ICC Quiescent Supply
Current
3.6 VI =VCCor GND 4 40 μA
IOLD Dynamic Output Current
(note1,2)
3.6 VOLD= 0.8V max 36 mA
IOHD VOHD=2V min -25 mA
1)Maximumtestduration 2ms,oneoutput loaded attime
2)Incident wave switchingisguaranteed ontransmission lineswithimpedances aslowas50Ω.
(*)Alloutputs loaded.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
VOLP Dynamic Low Voltage
Quiet Output (note1,2)
3.3 =50pF
0.4 0.8
VOLV -0.8 -0.5
VIHD Dynamic High Voltage
Input (note1,3)
3.3 2
VILD Dynamic Low Voltage
Input (note1,3)
3.3 0.8
1)Worst case package
2)Maxnumber ofoutputs defined as(n).Datainputs aredriven0Vto3.3V,(n -1)outputs switching andoneoutput atGND
3)maxnumber ofdatainputs(n)switching.(n-1)switching0Vto3.3V.Inputsunder testswitching: 3.3Vtothreshold(VILD),0Vtothreshold(VIHD).f=1MHz
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ELECTRICAL CHARACTERISTICS (CL=50 pF,RL= 500Ω, Inputtr =tf =3 ns)Symbol Parameter Test Condition Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
tPLH
tPHL
Propagation Delay TimetoQ
2.7 7.5 17.0 20.0 ns3.3(*) 6.0 12.0 14.0
tPHL Propagation Delay Time
CLRtoQ
2.7 10.0 18.0 20.0 ns3.3(*) 9.0 13.0 14.0
tw(L) CLR pulse Width, LOW 2.7 2.5 7.0 8.5 ns
3.3(*) 2.0 5.5 6.0 CK pulse Width 2.7 2.0 7.0 8.5 ns
3.3(*) 1.5 5.5 6.0
tsL
tsH
Setup TimeDto CK
HIGHor LOW
2.7 -0.4 6.5 8.5 ns3.3(*) -0.3 5.0 6.0
thL
thH
Hold TimeDtoCK
HIGHor LOW
2.7 0.4 3.0 3.5 ns3.3(*) 0.3 2.0 2.5
tREM Recovery Time CLRto
2.7 -0.1 5.0 6.5 ns3.3(*) 0.0 4.0 4.5
fMAX Maximum Clock
Frequency
2.7 60 150 50 MHz
3.3(*) 90 190 70
tOSLH
tOSHL
Outputto Output Skew
Time (note1,2)
2.7 0.5 1.0 1.5 ns
3.3(*) 0.5 1.0 1.5 Skewisdefinedastheabsolute value ofthedifference betweentheactual propagation delayforanytwooutputs ofthesamedevice switchinginthe
samedirection, eitherHIGHor LOW (tOSLH=|tPLHm -tPLHn|, tOSHL=|tPHLm-tpHLn|) Parameterguaranteed bydesign
(*) Voltagerangeis3.3V ±0.3V
CAPACITIVE CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
CIN Input Capacitance 3.3 5 pF
CPD Power Dissipation
Capacitance (note1)
3.3 fIN=10 MHz 30 pF
1)CPDisdefinedasthevalueoftheIC’sinternalequivalentcapacitance whichiscalculatedfromtheoperatingcurrentconsumption withoutload.(Referto
TestCircuit).Average operting current canbeobtainedbythefollowingequation. ICC(opr) =CPD• VCC• fIN+ICC/8(per FlipFlop)
74LVQ273
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TEST CIRCUIT =50pForequivalent(includes jigandprobecapacitance) =R1 =500Ωorequivalent
RT=ZOUTofpulsegenerator (typically50Ω)
WAVEFORM1: PROPAGATION DELAYS, SETUP AND HOLD TIMES, CLOCK PULSE WIDTH
(f=1MHz; 50% duty cycle)
74LVQ273
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Partno	Mfg	Dc	Qty	Available	Descript
74LVQ273T	ST	N/a	1269	avai	OCTAL D-TYPE FLIP FLOP WITH CLEAR