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74LVCU04A
Hex inverter
1/11July 2004 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:CC (OPR) = 1.65V to 3.6V (1.2V Data
Retention) PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 04 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTIONThe 74LVCU04A is a low voltage CMOS HEX
INVERTER SINGLE STAGE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS technology.
It is ideal for 1.65 to 3.6VCC operations and low
power and low noise applications.
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVCU04ALOW VOLTAGE CMOS HEX INVERTER
(SINGLE STAGE) HIGH PERFORMANCE
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes Rev. 5
74LVCU04A2/11
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description Table 3: Truth Table
Table 4: Absolute Maximum Ratings Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
74LVCU04A3/11
Table 5: Recommended Operating Conditions 1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2V at VCC = 3.0V
Table 6: DC Specifications
74LVCU04A4/11
Table 7: Dynamic Switching Characteristics 1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
Table 8: AC Electrical Characteristics 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|
2) Parameter guaranteed by design
Table 9: Capacitive Characteristics 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
74LVCU04A5/11
Figure 3: Test Circuit RT = ZOUT of pulse generator (typically 50Ω)
Table 10: Test Circuit And Waveform Symbol Value
Figure 4: Waveform - Propagation Delay (f=1MHz; 50% duty cycle)
