74LVCH162373ADL ,16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-stateINTEGRATED CIRCUITSDATA SHEET74LVC162373A; 74LVCH162373A16-bit D-type transparent latch with30 Ω se ..
74LVCH162373ADL ,16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-stateapplications.exceeds 2000 V One latch enable (LE) input and one output enable (OE) are provide for ..
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74LVCH162373ADGG-74LVCH162373ADL
16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-state
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors;5V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
FEATURES ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000V EIA/JESD22-A115-A
exceeds 200V5 V tolerant input/output for
interfacing with 5 V logic Wide supply voltage range of
1.2to 3.6V Complies with JEDEC standard
no. 8-1A CMOS low power consumption MULTIBYTE flow-through
standard pin-out architecture Low inductancemultiple powerand
ground pinsfor minimum noise and
ground bounce Direct interface with TTL levels All data inputs have bus hold
(74LVCH162373A only) High impedance when VCC =0 Power off disables outputs,
permitting live insertion.
DESCRIPTIONThe 74LVC(H)162373Aisa 16-bit D-type transparent latch featuring separate
D-type inputs for each latch and 3-state outputs for bus oriented applications.
One latch enable (LE) input and one output enable (OE) are provide for each
octal. Inputs canbe driven from either 3.3or5V devices.In 3-state operation,
outputs can handle 5 V. These features allow the use of these devices in a
mixed 3.3 and5 V environment.
The74LVC(H)162373 consistsof 2sectionsof eight D-type transparent latches
with 3-state true outputs. When LE is HIGH, data at the Dn inputs enter the
latches. In this condition the latches are transparent, i.e. a latch output will
change each time its corresponding D-input changes.
When LE is LOW the latches store the information that was present at the
D-inputs a set-up time preceding the HIGH-to-LOW transition of LE.
When OEis LOW, the contentsof the eight latches are availableat the outputs.
When OE is HIGH, the outputs go to the high-impedance OFF-state.
Operation of the OE input does not affect the state off latches.
The74LVCH162373A bus hold data inputs eliminates the needfor external pull
up resistors to hold unused inputs.
The 74LVC(H)162373A is designed with 30 Ω series termination resistors in
both HIGH and LOW output stages to reduce line noise.
FUNCTION TABLE (per section of eight bits)See note1.
Note H= HIGH voltage level;= HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;= LOW voltage level;= LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;= high-impedance OFF-state.
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 2.5 ns.
Note CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑ (CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz; (CL× VCC2×fo)= sum of outputs;= output load capacitance in pF;
VCC= supply voltage in Volts.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground=0V).
Note The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
DC CHARACTERISTICSOver recommended operating conditions; voltage are referenced to GND (ground=0V).
Notes All typical values are at VCC= 3.3 V and Tamb =25 °C. For bus hold parts, the bus hold circuit is switched off when VI exceeds VCC allowing 5.5 V on the input terminal. Valid for data inputs of bus hold parts (LVCH162373-A) only. For data inputs only, control inputs do not have a bus hold circuit. The specified sustaining current at the data input holds the input below the specified VI level. The specified overdrive current at the data input forces the data input to the opposite logic input state.
Philips Semiconductors Product specification
16-bit D-type transparent latch with 30 Ω series
termination resistors; 5 V input/output tolerant; 3-state
74L VC162373A;
74LVCH162373A
AC CHARACTERISTICSGND=0 V; tr =tf≤ 2.5 ns; Tamb= −40to +85 °C.
Note Typical values at VCC= 3.3 V and Tamb =25 °C.
