74LVC257APW ,Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-StateLogic diagram5. Pinning information5.1 Pinning 74LVC257Aterminal 1SV 1 16CCindex area1I0 2 15 OE1I0 ..
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74LVC257APW
Quad 2-input multiplexer with 5 V tolerant inputs/outputs; 3-state
1. General descriptionThe 74LVC257A is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of
data from two sources and are controlled by a common data select input (pin S). The data
inputs from source 0 (pins 1I0to 4I0) are selected when pin S is LOW and the data inputs
from source 1 (pins 1I1to 4I1) are selected when pin S is HIGH. Data appears at the
outputs (pins 1Yto 4Y) in true (non-inverting) form from the selected inputs. The device is
the logic implementation of a 4-pole, 2-position switch, where the position of the switch is
determined by the logic levels applied to pin S. The outputs are forced to a
high-impedance OFF-state when pin OE is HIGH.
Inputs can be driven from either 3.3 V or 5.0 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and5 V applications.
2. Features and benefits 5 V tolerant inputs/outputs, for interfacing with 5 V logic Wide supply voltage range from 1.2 Vto 3.6V CMOS low-power consumption Direct interface with TTL levels Output drive capability 50 transmission lines at 85 C Complies with JEDEC standard: JESD8-7A (1.65Vto 1.95V) JESD8-5A (2.3Vto 2.7V) JESD8-C/JESD36 (2.7Vto 3.6V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115B exceeds 200V CDM JESD22-C101E exceeds 1000V Specified from 40 C to +85 C and 40 C to +125C
74L VC257A
Quad 2-input multiplexer with 5 V tolerant inputs/outputs;
3-state
Rev. 6 — 28 November 2011 Product data sheet
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
3. Ordering information
4. Functional diagram
Table 1. Ordering information74LVC257AD 40 Cto +125C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LVC257ADB 40 Cto +125C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LVC257APW 40 Cto +125C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LVC257ABQ 40 Cto +125C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
5. Pinning information
5.1 PinningNXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
5.2 Pin description
6. Functional description[1] H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
Table 2. Pin description 1 common data select input
1I0 2 data input from source 0
1I1 3 data input from source 1 4 3-state multiplexer output
2I0 5 data input from source 0
2I1 6 data input from source 1 7 3-state multiplexer output
GND 8 ground (0 V) 9 3-state multiplexer output
3I1 10 data input from source 1
3I0 11 data input from source 0 12 3-state multiplexer output
4I1 13 data input from source 1
4I0 14 data input from source 0 15 3-state output enable input (active LOW)
VCC 16 supply voltage
Table 3. Function table[1] XXXZ X LL X H H
LLLX L
LLH X H
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
7. Limiting values[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of Ptotderates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 - 50 mA output voltage HIGH or LOW state [2] 0.5 VCC + 0.5 V
output 3-state [2] 0.5 +6.5 V output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C [3]- 500 mW
Table 5. Recommended operating conditionsVCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V input voltage 0 - 5.5 V output voltage HIGH or LOW state 0 - VCC V
3-state 0 - 5.5 V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall
rate
VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
9. Static characteristics[1] All typical values are measured at VCC=3.3 V (unless stated otherwise) and Tamb =25C.
Table 6. Static characteristicsAt recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 VCC - - 0.65 VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 VCC -0.35 VCCV
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage =VIHorVIL= 100 A;
VCC =1.65Vto3.6V
VCC 0.2 - - VCC 0.3 - V= 4mA; VCC = 1.65 V 1.2 - - 1.05 - V= 8mA; VCC = 2.3V 1.8 - - 1.65 - V= 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V= 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V= 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage =VIHorVIL= 100 A;
VCC= 1.65Vto 3.6 V - 0.2 - 0.3 V =4mA; VCC = 1.65 V - - 0.45 - 0.65 V =8mA; VCC = 2.3V - - 0.6 - 0.8 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V input leakage
current
VCC = 3.6 V; VI =5.5V orGND - 0.1 5- 20 A
IOZ OFF-state
output
current =VIHor VIL; VCC= 3.6 V; =5.5V orGND; 0.1 5- 20 A
IOFF power-off
leakage
current
VCC = 0 V; VIorVO = 5.5V - 0.1 10 - 20 A
ICC supply
current
VCC = 3.6 V; VI =VCCor GND; =0A
-0.1 10 - 40 A
ICC additional
supply
current
per input pin;
VCC= 2.7Vto 3.6V; =VCC 0.6 V; IO =0A 5 500 - 5000 A input
capacitance
VCC= 0 V to 3.6V; =GNDto VCC
-5.0 - - - pF
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state
10. Dynamic characteristicsTable 7. Dynamic characteristicsVoltages are referenced to GND (ground=0 V). For test circuit see Figure9.
tpd propagation delay nI0, nI1 to nY; see Figure7 [2]
VCC = 1.2 V - 16 - - - ns
VCC = 1.65 V to 1.95 V 1.5 5.2 10.6 1.5 12.3 ns
VCC = 2.3 V to 2.7 V 1.0 2.8 5.5 1.0 6.4 ns
VCC = 2.7V 1.0 2.8 5.4 1.0 7.0 ns
VCC = 3.0 V to 3.6V 1.0 2.4 4.6 1.0 6.0 ns to nY; see Figure7 [2]
VCC = 1.2 V - 18 - - - ns
VCC = 1.65 V to 1.95 V 1.0 6.0 14.8 1.0 17.1 ns
VCC = 2.3 V to 2.7 V 1.0 3.2 7.7 1.0 8.9 ns
VCC = 2.7V 1.0 3.2 7.5 1.0 9.5 ns
VCC = 3.0 V to 3.6V 1.0 2.7 6.4 1.0 8.0 ns
ten enable time OEto nY; see Figure8 [2]
VCC = 1.2 V - 15 - - - ns
VCC = 1.65 V to 1.95 V 1.5 5.8 12.7 1.5 14.7 ns
VCC = 2.3 V to 2.7 V 1.5 3.3 7.0 1.5 8.1 ns
VCC = 2.7 V 1.5 3.4 6.7 1.5 8.5 ns
VCC = 3.0 V to 3.6 V 1.0 2.7 5.6 1.0 7.0 ns
tdis disable time OEto nY; see Figure8 [2]
VCC = 1.2 V - 8 - - - ns
VCC = 1.65 V to 1.95 V 2.2 4.0 8.2 2.2 9.4 ns
VCC = 2.3 V to 2.7 V 0.5 2.2 4.4 0.5 5.1 ns
VCC = 2.7 V 1.5 3.0 4.7 1.5 6.0 ns
VCC = 3.0 V to 3.6 V 1.0 2.8 4.3 1.0 5.5 ns
tsk(o) output skew time VCC= 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state[1] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where: = input frequency in MHz; fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in Volts= number of inputs switching
(CL VCC2fo)= sum of the outputs
11. WaveformsCPD power dissipation
capacitance
per input; VI =GNDto VCC [4]
VCC = 1.65 V to 1.95 V - 8.0 - - - pF
VCC = 2.3 V to 2.7 V - 11.4 - - - pF
VCC = 3.0 V to 3.6 V - 14.4 - - - pF
Table 7. Dynamic characteristics …continuedVoltages are referenced to GND (ground=0 V). For test circuit see Figure9.
NXP Semiconductors 74L VC257A
Quad 2-input multiplexer with 5V tolerant; 3-state