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74LVC257AD-74LVC257ADB
Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs 3-State
Product specification
Superceded data of 1997 Sep 26
IC24 Data Handbook
1998 Jul 29
Philips Semiconductors Product specification
74LVC257AQuad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
FEATURES Wide supply voltage range of 1.2 to 3.6 V In accordance with JEDEC standard no. 8-1A CMOS lower power consumption Direct interface with TTL levels Output drive capability 50 transmission lines at 85°C 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTIONThe 74LVC257A is a high-performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC257A is a quad 2-input multiplexer with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a
common data select input (S). The data inputs from source 0 (1l0 to
4l0) are selected when input S is LOW and the data inputs from
source 1 (1l1 to 4l1) are selected when S in HIGH. Data appears at the
outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74LVC257A is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determined by the logic
levels applied to S. The outputs are forced to a high impedance
OFF-state when OE is HIGH.
QUICK REFERENCE DATAGND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns
NOTE: CPD is used to determine the dynamic power dissipation (PD in μW)
PD = CPD × VCC 2 × fi (CL × VCC 2 × fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
(CL × VCC2 × fo) = sum of the outputs.
ORDERING INFORMATION
PIN CONFIGURATION
LOGIC SYMBOL
Philips Semiconductors Product specification
74LVC257AQuad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
PIN DESCRIPTION
LOGIC SYMBOL (IEEE/IEC)
FUNCTIONAL DIAGRAM
FUNCTION TABLE
NOTES:= HIGH voltage level= LOW voltage level= don’t care= high impedance OFF-state
LOGIC DIAGRAM
Philips Semiconductors Product specification
74LVC257AQuad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS1In accordance with the Absolute Maximum Rating System (IEC 134); Voltages are referenced to GND (ground = 0V)
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
74LVC257AQuad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
DC ELECTRICAL CHARACTERISTICSOver recommended operating conditions voltages are referenced to GND (ground = 0V)
NOTES: All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICSGND = 0 V; tr = tf � 2.5 ns; CL = 50 pF; RL = 500; Tamb = –40C to +85C
NOTE: These typical values are at VCC = 3.3V and Tamb = 25°C.
Philips Semiconductors Product specification
74LVC257AQuad 2-input multiplexer with 5 Volt tolerant
inputs/outputs (3-State)
AC WAVEFORMSVM = 0.5 × VCC at VCC < 2.7 V
VM = 1.5 V at VCC ≥ 2.7 V
VX = VOL + 0.3 V at VCC ≥ 2.7 V
VX = VOL + 0.1 × VCC at VCC < 2.7 V
VY = VOH – 0.3 V at VCC ≥ 2.7V
VY = VOH – 0.1 × VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
Figure 1. Input (S, nl0, nl1) to output (nY) propagation delays.
Figure 2. 3-state enable and disable times.
TEST CIRCUIT
Figure 3. Load circuitry for switching times.
