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74LVC245ABQ-74LVC245AD-74LVC245ADB-74LVCH245AD-74LVCH245APW
Octal bus transceiver; 3-state
1. General description
The 74LVC245A; 74LVCH245A are 8-bit transceivers featuring non-inverting 3-state bus
compatible outputs in both send and receive directions. The device features an output
enable (OE) input for easy cascading and a send/receive (DIR) input for direction control.
OE controls the outputs so that the buses are effectively isolated.
Inputs can be driven from either 3.3Vor5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices in mixed
3.3V and5 V applications.
The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up
resistors to hold unused inputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 Vto 3.6V CMOS low-power consumption Direct interface with TTL levels Inputs accept voltages up to 5.5 V High-impedance when VCC = 0 V Bus hold on all data inputs (74LVCH245A only) Complies with JEDEC standard: JESD8-7A (1.65Vto 1.95V) JESD8-5A (2.3Vto 2.7V) JESD8-C/JESD36 (2.7Vto 3.6V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115B exceeds 200V CDM JESD22-C101E exceeds 1000V Specified from 40 C to +85 C and 40 C to +125C
74L VC245A; 74L VCH245A
Octal bus transceiver; 3-state
Rev. 8 — 28 June 2013 Product data sheet
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
3. Ordering information

4. Functional diagram

Table 1. Ordering information

74LVC245AD 40 C to +125 C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74LVCH245AD
74LVC245ADB 40 C to +125 C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74LVCH245ADB
74LVC245APW 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
74LVCH245APW
74LVC245ABQ 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
SOT764-1
74LVCH245ABQ
74LVC245ABX 40 C to +125 C DHXQFN20 plastic dual in-line compatible thermal enhanced
extremely thin quad flat package; no leads; 20
terminals; body 4.5 2.5 0.5 mm
SOT1045-2
74LVCH245ABX
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
5. Pinning information
5.1 Pinning

5.2 Pin description

Table 2. Pin description

DIR 1 direction control
A0 to A7 2, 3, 4, 5, 6, 7, 8, 9 data input/output
GND 10 ground (0 V)
B0 to B7 18, 17, 16, 15, 14, 13, 12, 11 data input/output 19 output enable input (active LOW)
VCC 20 supply voltage
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
6. Functional description

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance OFF-state.
7. Limiting values

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO20 packages: above 70 C derate linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 and DHXQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
Table 3. Function selection[1]
L An = Bn inputs H inputs Bn = An Z Z
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI <0V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO >VCC or VO <0V - 50 mA output voltage output HIGH or LOW [2] 0.5 VCC +0.5 V
output 3-state [2] 0.5 +6.5 V output current VO =0V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 C to +125C [3] -500 mW
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

VCC supply voltage 1.65 - 3.6 V
functional 1.2 - 3.6 V input voltage 0 - 5.5 V output voltage output HIGH or LOW 0 - VCC V
output 3-state 0 - 5.5 V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate VCC = 1.2 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65  VCC - - 0.65  VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35  VCC - 0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage =VIHorVIL= 100 A;
VCC= 1.65Vto 3.6V
VCC 0.2 - - VCC 0.3 - V= 4mA; VCC = 1.65 V 1.2 - - 1.05 - V= 8mA; VCC = 2.3V 1.8 - - 1.65 - V= 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V= 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V= 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage =VIHorVIL =100 A;
VCC= 1.65Vto 3.6 V 0.2 - 0.3 V =4mA; VCC = 1.65 V - - 0.45 - 0.65 V =8mA; VCC = 2.3V - - 0.6 - 0.8 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V input leakage
current= 5.5Vor GND;
VCC =3.6V
[2] - 0.1 5- 20 A
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state

[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25C.
[2] The bus hold circuit is switched off when VI >VCC allowing 5.5 V on the input terminal.
[3] For I/O ports the parameter IOZ includes the input leakage current.
[4] Valid for data inputs of bus hold parts only (74LVCH245A). Note that control inputs do not have a bus hold circuit.
[5] The specified sustaining current at the data input holds the input below the specified VI level.
[6] The specified overdrive current at the data input forces the data input to the opposite input state.
IOZ OFF-state
output current =VIHor VIL; =5.5V orGND;
VCC =3.6V
[3] - 0.1 5- 20 A
IOFF power-off
leakage
currentorVO =5.5 V; VCC = 0.0 0.1 10 - 20 A
ICC supply
current =VCCor GND; IO =0A;
VCC =3.6V
-0.1 10 - 40 A
ICC additional
supply
current
per input pin; =VCC 0.6 V; IO =0A;
VCC= 2.7 V to 3.6 V 5 500 - 5000 A input
capacitance
VCC= 0 V to 3.6V; =GNDto VCC
-4.0 - - - pF
CI/O input/output
capacitance
VCC= 0 V to 3.6V; =GNDto VCC
-10 - - - pF
IBHL bus hold
LOW current
VCC = 1.65; VI = 0.58 V [4][5] 10 - - 10 - A
VCC = 2.3; VI = 0.7 V 30 - - 25 - A
VCC = 3.0; VI = 0.8 V 75 - - 60 - A
IBHH bus hold
HIGH current
VCC = 1.65; VI = 1.07 V [4][5] 10 - - 10 - A
VCC = 2.3; VI = 1.7 V 30 - - 25 - A
VCC = 3.0; VI = 2.0 V 75 - - 60 - A
IBHLO bus hold
LOW
overdrive
current
VCC = 1.95 V 200 - - 200 - A
VCC = 2.7 V 300 - - 300 - A
VCC = 3.6 V [4][6] 500 - - 500 - A
IBHHO bus hold
HIGH
overdrive
current
VCC = 1.95 V 200 - - 200 - A
VCC = 2.7 V 300 - - 300 - A
VCC = 3.6 V [4][6] 500 - - 500 - A
Table 6. Static characteristics …continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
10. Dynamic characteristics

[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where: = input frequency in MHz; fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in Volts= number of inputs switching
(CL VCC2fo)= sum of the outputs.
Table 7. Dynamic characteristics

Voltages are referenced to GND (ground=0 V). For test circuit see Figure7.
tpd propagation
delay
nAnto nBn; nBnto nAn; see Figure5 [1]
VCC= 1.2V - 17.0 - - - ns
VCC = 1.65 V to 1.95 V 1.5 6.5 14.6 1.5 16.9 ns
VCC = 2.3 V to 2.7 V 1.0 3.4 7.6 1.0 8.7 ns
VCC = 2.7 V 1.5 3.4 7.3 1.5 9.5 ns
VCC = 3.0 V to 3.6 V 1.5 2.9 6.3 1.5 8.0 ns
ten enable time nOEto nAn, nBn; see Figure6 [1]
VCC= 1.2V - 22.0 - - - ns
VCC = 1.65 V to 1.95 V 1.9 8.3 19.5 1.9 22.5 ns
VCC = 2.3 V to 2.7 V 1.5 4.6 10.7 1.5 12.4 ns
VCC = 2.7 V 1.5 4.8 9.5 1.5 12.0 ns
VCC = 3.0 V to 3.6 V 1.5 3.7 8.5 1.5 11.0 ns
tdis disable time nOEto nAn, nBn; see Figure6 [1]
VCC= 1.2V - 12.0 - - - ns
VCC = 1.65 V to 1.95 V 2.9 5.5 12.3 2.9 14.2 ns
VCC = 2.3 V to 2.7 V 1.0 3.1 7.1 1.0 8.2 ns
VCC = 2.7 V 1.5 3.9 8.0 1.5 10.0 ns
VCC = 3.0 V to 3.6 V 1.7 3.6 7.0 1.7 9.0 ns
tsk(o) output skew
time
[3] - - 1.0 - 1.5 ns
CPD power
dissipation
capacitance
per input; VI =GNDto VCC [4]
VCC = 1.65 V to 1.95 V - 7.7 - - - pF
VCC = 2.3 V to 2.7 V - 11.3 - - - pF
VCC = 3.0 V to 3.6 V - 14.4 - - - pF
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state
11. AC waveforms

Table 8. Measurement points

1.2V 0.5 VCC VCC  2.5ns VOL + 0.15 V VOH  0.15 V
1.65Vto 1.95V 0.5 VCC VCC  2.5ns VOL + 0.15 V VOH  0.15 V
2.3Vto 2.7V 0.5 VCC VCC  2.5ns VOL + 0.15 V VOH  0.15 V
2.7V 1.5V 2.7V  2.5ns VOL + 0.3 V VOH  0.3 V
3.0V to 3.6V 1.5V 2.7V  2.5ns VOL + 0.3 V VOH  0.3 V
NXP Semiconductors 74LVC245A; 74LVCH245A
Octal bus transceiver; 3-state

Table 9. Test data

1.2V VCC  2 ns 30pF 1 k open 2  VCC GND
1.65Vto 1.95V VCC  2 ns 30pF 1 k open 2  VCC GND
2.3Vto 2.7V VCC  2 ns 30pF 500 open 2  VCC GND
2.7V 2.7V  2.5ns 50pF 500 open 2  VCC GND
3.0Vto 3.6V 2.7V  2.5ns 50pF 500 open 2  VCC GND
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