74LVC1G79GW ,74LVC1G79; Single D-type flip-flop; positive edge triggerFEATURES DESCRIPTION• Wide supply voltage range from 1.65 V to 5.5 V The 74LVC1G79 is a high-perfor ..
74LVC1G79GW ,74LVC1G79; Single D-type flip-flop; positive edge triggerGeneral descriptionThe 74LVC1G79 provides a single positive-edge triggered D-type flip-flop.Informa ..
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74LVC1G79GW
74LVC1G79; Single D-type flip-flop; positive edge trigger
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
FEATURES Wide supply voltage range from 1.65Vto 5.5V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65Vto 1.95V) JESD8-5 (2.3Vto 2.7V) JESD8B/JESD36 (2.7Vto 3.6V).
•±24 mA output drive (VCC= 3.0V) ESD protection: HBM EIA/JESD22-A114-B exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5V Multiple package options Specified from −40°Cto +85 °C and
−40°Cto +125 °C.
DESCRIPTIONThe 74LVC1G79 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3Vor5 V devices.
This feature allows the use of this device in a mixed
3.3V and5 V environment.
This device is fully specified for partial Power-down
applications using Ioff. TheIoff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G79 providesa single positive-edge triggered
D-type flip-flop.
Informationon the data inputis transferredto theQ output
on the LOW-to-HIGH transition of the clock pulse.
TheD input must be stable one set-up time prior to the
LOW-to-HIGH clock transition for predictable operation.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 2.5 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts;= total load switching outputs;
Σ(CL× VCC2×fo)= sum of the outputs. The condition is VI= GNDto VCC.
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= LOW voltage level;= LOW-to-HIGH CP transition;= don’t care;= lower case letter indicates the stateof referenced input, one set-up time priorto the LOW-to-HIGH CP transition.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Note The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
DC CHARACTERISTICSAt recommended operating conditions; voltages are referenced to GND (ground=0 V).
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
Note All typical values are measured at VCC= 3.3 V and Tamb =25 °C.
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger 74L VC1G79
AC CHARACTERISTICSGND=0V.
