74LVC1G53DC-74LVC1G53DP Fast Delivery |IC PHOENIX CO.,LIMITED

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74LVC1G53DC-74LVC1G53DP
2-channel analog multiplexer/demultiplexer
1. General description
The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device.
The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select
input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an
active LOW enable input (E). When pin E is HIGH, the switch is turned off.
Schmitt trigger action at the select and enable inputs makes the circuit tolerant of slower
input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.
2. Features and benefits Wide supply voltage range from 1.65 V to 5.5V Very low ON resistance: 7.5  (typical) at VCC =2.7V 6.5  (typical) at VCC =3.3V6  (typical) at VCC =5V Switch current capability of 32 mA High noise immunity CMOS low power consumption TTL interface compatibility at 3.3 V Latch-up performance meets requirements of JESD 78 Class I ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101E exceeds 1000V Control inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125C
74L VC1G53
2-channel analog multiplexer/demultiplexer
Rev. 9 — 5 April 2013 Product data sheet
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
74LVC1G53DP 40 Cto +125C TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
74LVC1G53DC 40 Cto +125C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
SOT765-1
74LVC1G53GT 40 Cto +125C XSON8 plastic extremely thin small outline package; no leads; terminals; body 1  1.95  0.5 mm
SOT833-1
74LVC1G53GF 40 C to +125 C XSON8 extremely thin small outline package; no leads; terminals; body 1.351 0.5 mm
SOT1089
74LVC1G53GD 40 Cto +125C XSON8 plastic extremely thin small outline package; no leads; terminals; body 3  2  0.5 mm
SOT996-2
74LVC1G53GM 40 C to +125C XQFN8 plastic, extremely thin quad flat package; no leads; terminals; body 1.6 1.6 0.5 mm
SOT902-2
74LVC1G53GN 40 C to +125C XSON8 extremely thin small outline package; no leads; terminals; body 1.2 1.0 0.35 mm
SOT1116
74LVC1G53GS 40 C to +125C XSON8 extremely thin small outline package; no leads; terminals; body 1.35 1.0 0.35 mm
SOT1203
Table 2. Marking codes
74LVC1G53DC V53
74LVC1G53DP V53
74LVC1G53GT V53
74LVC1G53GF V3
74LVC1G53GD V53
74LVC1G53GM V53
74LVC1G53GN V3
74LVC1G53GS V3
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
6.2 Pin description
7. Functional description
[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z= high-impedance OFF-state.
Table 3. Pin description 1 7 common output or input 2 6 enable input (active LOW)
GND 3 5 ground (0V)
GND 4 4 ground (0V) 5 3 select input 6 2 independent input or output 7 1 independent input or output
VCC 8 8 supply voltage
Table 4. Function table[1] L Y0 to Z or Z to Y0 L Y1 to Z or Z to Y1 H Z (switch off)
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
8. Limiting values
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
[3] For TSSOP8 packages: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 packages: above 110 C the value of Ptot derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
[1] To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit
for the voltage drop across the switch.
[2] Applies to control signal levels.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referencedto GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V input voltage [1] 0.5 +6.5 V
IIK input clamping current VI< 0.5 V or VI >VCC + 0.5 V 50 - mA
ISK switch clamping current VI< 0.5 V or VI >VCC + 0.5 V - 50 mA
VSW switch voltage enable and disable mode [2] 0.5 VCC + 0.5 V
ISW switch current VSW> 0.5 V or VSW < VCC + 0.5 V - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 Cto+125C [3]- 250 mW
Table 6. Operating conditions
VCC supply voltage 1.65 5.5 V input voltage 0 5.5 V
VSW switch voltage enable and disable mode [1] 0VCC V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate VCC =1.65Vto2.7V [2]- 20 ns/V
VCC= 2.7Vto 5.5V [2]- 10 ns/V
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
10. Static characteristics
[1] Typical values are measured at Tamb= 25 C.
[2] These typical values are measured at VCC =3.3V.
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0V).
VIH HIGH-level
input voltage
VCC= 1.65Vto 1.95V 0.65  VCC - - 0.65  VCC -V
VCC= 2.3Vto 2.7V 1.7 - - 1.7 - V
VCC=3Vto 3.6V 2.0 - - 2.0 - V
VCC= 4.5Vto 5.5V 0.7  VCC -- 0.7  VCC -V
VIL LOW-level
input voltage
VCC= 1.65Vto 1.95V - - 0.35  VCC - 0.35  VCC V
VCC= 2.3Vto 2.7V - - 0.7 - 0.7 V
VCC=3Vto 3.6V - - 0.8 - 0.8 V
VCC= 4.5Vto 5.5V - - 0.3  VCC -0.3  VCC V input leakage
current
pin S and pin E; =5.5V orGND;
VCC =0Vto5.5V
[2] - 0.1 2- 10 A
IS(OFF) OFF-state
leakage
current
VCC =5.5V;
see Figure7
[2] - 0.1 5- 20 A
IS(ON) ON-state
leakage
current
VCC =5.5V;
see Figure8
[2] - 0.1 5- 20 A
ICC supply current VI= 5.5 Vor GND;
VSW =GNDor VCC;
VCC =1.65Vto5.5V
[2] -0.1 10 - 40 A
ICC additional
supply current
pin S and pin E; =VCC 0.6V;
VSW =GNDor VCC;
VCC =5.5V
[2] -5 500 - 5000 A input
capacitance
-2.5 - - - pF
CS(OFF) OFF-state
capacitance
-6.0 - - - pF
CS(ON) ON-state
capacitance
-18 - - - pF
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
10.1 Test circuits
10.2 ON resistance
Table 8. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 10 to Figure 15.
RON(peak) ON resistance (peak) VI =GNDto VCC; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V 34.0 130 - 195 
ISW =8mA; VCC= 2.3Vto 2.7V - 12.0 30 - 45 
ISW =12mA; VCC= 2.7V - 10.4 25 - 38 
ISW =24mA; VCC =3Vto3.6V - 7.8 20 - 30 
ISW =32mA; VCC= 4.5Vto 5.5V - 6.2 15 - 23 
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
[1] Typical values are measured at Tamb= 25 C and nominal VCC.
[2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
10.3 ON resistance test circuit and graphs
RON(rail) ON resistance (rail) VI= GND; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V
-8.2 18 - 27 
ISW =8mA; VCC= 2.3Vto 2.7V - 7.1 16 - 24 
ISW =12mA; VCC =2.7V - 6.9 14 - 21 
ISW =24mA; VCC =3Vto3.6V - 6.5 12 - 18 
ISW =32mA; VCC= 4.5Vto 5.5V - 5.8 10 - 15  =VCC; see Figure9
ISW =4mA;
VCC= 1.65Vto 1.95V 10.4 30 - 45 
ISW =8mA; VCC= 2.3Vto 2.7V - 7.6 20 - 30 
ISW =12mA; VCC =2.7V - 7.0 18 - 27 
ISW =24mA; VCC =3Vto3.6V - 6.1 15 - 23 
ISW =32mA; VCC= 4.5Vto 5.5V - 4.9 10 - 15 
RON(flat) ON resistance
(flatness) =GNDto VCC [2]
ISW =4mA;
VCC= 1.65Vto 1.95V
-26.0 - - - 
ISW =8mA; VCC= 2.3Vto 2.7V - 5.0 - - - 
ISW =12mA; VCC =2.7V - 3.5 - - - 
ISW =24mA; VCC =3Vto3.6V - 2.0 - - - 
ISW =32mA; VCC= 4.5Vto 5.5V - 1.5 - - - 
Table 8. ON resistance …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 10 to Figure 15.
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25 C and nominal VCC.
[2] tpd is the same as tPLH and tPHL.
[3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when
driven by an ideal voltage source (zero output impedance).
[4] ten is the same as tPZH and tPZL.
[5] tdis is the same as tPLZ and tPHZ.
Table 9. Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0 V); for load circuit see Figure 18.
tpd propagation delayZto Yn or Yn to Z; see Figure16 [2][3]
VCC = 1.65 V to 1.95 V - - 2 - 2.5 ns
VCC = 2.3 V to 2.7 V - - 1.2 - 1.5 ns
VCC = 2.7 V - - 1.0 - 1.25 ns
VCC = 3.0 V to 3.6 V - - 0.8 - 1.0 ns
VCC = 4.5 V to 5.5 V - - 0.6 - 0.8 ns
ten enable time S toZor Yn; see Figure 17 [4]
VCC = 1.65 V to 1.95 V 2.6 6.7 10.3 2.6 12.9 ns
VCC = 2.3 V to 2.7 V 1.9 4.1 6.4 1.9 8.0 ns
VCC = 2.7 V 1.9 4.0 5.5 1.8 7.0 ns
VCC = 3.0 V to 3.6 V 1.8 3.4 5.0 1.8 6.3 ns
VCC = 4.5 V to 5.5 V 1.3 2.6 3.8 1.3 4.8 nstoZor Yn; see Figure 17 [4]
VCC = 1.65 V to 1.95 V 1.9 4.0 7.3 1.9 9.2 ns
VCC = 2.3 V to 2.7 V 1.4 2.5 4.4 1.4 5.5 ns
VCC = 2.7 V 1.1 2.6 3.9 1.1 4.9 ns
VCC = 3.0 V to 3.6 V 1.2 2.2 3.8 1.2 4.8 ns
VCC = 4.5 V to 5.5 V 1.0 1.7 2.6 1.0 3.3 ns
tdis disable time S toZor Yn; see Figure 17 [5]
VCC = 1.65 V to 1.95 V 2.1 6.8 10.0 2.1 12.5 ns
VCC = 2.3 V to 2.7 V 1.4 3.7 6.1 1.4 7.7 ns
VCC = 2.7 V 1.4 4.9 6.2 1.4 7.8 ns
VCC = 3.0 V to 3.6 V 1.1 4.0 5.4 1.1 6.8 ns
VCC = 4.5 V to 5.5 V 1.0 2.9 3.8 1.0 4.8 nstoZor Yn; see Figure 17 [5]
VCC = 1.65 V to 1.95 V 2.3 5.6 8.6 2.3 11.0 ns
VCC = 2.3 V to 2.7 V 1.2 3.2 4.8 1.2 6.0 ns
VCC = 2.7 V 1.4 4.0 5.2 1.4 6.5 ns
VCC = 3.0 V to 3.6 V 2.0 3.7 5.0 2.0 6.3 ns
VCC = 4.5 V to 5.5 V 1.3 2.9 3.8 1.3 4.8 ns
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
11.1 Waveforms and test circuits
Table 10. Measurement points
1.65 V to 2.7V 0.5  VCC 0.5  VCC VOL +0.15V VOH 0.15V
2.7 V to 5.5V 0.5  VCC 0.5  VCC VOL +0.3V VOH 0.3V
NXP Semiconductors 74LVC1G53
2-channel analog multiplexer/demultiplexer
11.2 Additional dynamic characteristics
Table 11. Test data
1.65 V to 1.95V VCC  2.0ns 30pF 1k open GND 2  VCC
2.3 V to 2.7V VCC  2.0ns 30pF 500 open GND 2  VCC
2.7V VCC  2.5ns 50pF 500 open GND 2  VCC V to 3.6V VCC  2.5ns 50pF 500 open GND 2  VCC
4.5 V to 5.5V VCC  2.5ns 50pF 500 open GND 2  VCC
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0 V); Tamb =25 C.
THD total harmonic distortion fi= 600 Hz to 20 kHz; RL= 600; =50pF; VI= 0.5 V (p-p); see Figure19
VCC= 1.65V - 0.260 - %
VCC= 2.3V - 0.078 - %
VCC= 3.0V - 0.078 - %
VCC= 4.5V - 0.078 - %
f(3dB) 3 dB frequency response RL =50 ; CL=5 pF; see Figure20
VCC =1.65V - 200 - MHz
VCC =2.3V - 300 - MHz
VCC =3.0V - 300 - MHz
VCC =4.5V - 300 - MHz

Partno	Mfg	Dc	Qty	Available	Descript
74LVC1G53DC	NXP	N/a	6000	avai	2-channel analog multiplexer/demultiplexer
74LVC1G53DP	NXP	N/a	2480	avai	2-channel analog multiplexer/demultiplexer