74LVC1G32GV ,Single 2-input OR gateINTEGRATED CIRCUITSDATA SHEET74LVC1G32Single 2-input OR gateProduct specification 2004 Sep 15Superse ..
74LVC1G32GW ,74LVC1G32; Single 2-input OR gatePin configuration SOT886 74LVC1G3274LVC1G32B 1 5 VCCB 1 6 VCC3GNDA 2 5 n.c.A 2 4 YGND 3 4 Y001aaf00 ..
74LVC1G332GF ,Single 3-input OR gateFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complie ..
74LVC1G332GW ,Single 3-input OR gateLogic diagram74LVC1G332 All information provided in this document is subject to legal disclaimers. ..
74LVC1G34GM ,Single bufferFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for inte ..
74LVC1G34GW ,Single bufferLogic diagram74LVC1G34 All information provided in this document is subject to legal disclaimers. ..
81487EIB ,【15kV ESD Protected, 1/8 Unit Load, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
8155H-2 , 2048-BIT STATIC HMOS RAM WITH I/O PORTS AND TIMER
8169 ,DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX⑩applications with commercial audio D/A converters. The output sampling frequency is fixed at 48 kHz ..
8-188275-4 , AMP Micro-Match Miniature Connector System
81C55 ,2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER
81C55 ,2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER
74LVC1G32GM-74LVC1G32GV
74LVC1G32; Single 2-input OR gate
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
FEATURES Wide supply voltage range from 1.65 Vto 5.5V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 Vto 1.95V) JESD8-5 (2.3 V to 2.7V) JESD8B/JESD36 (2.7 Vto 3.6V).
•±24 mA output drive (VCC= 3.0V) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5V Multiple package options ESD protection: HBM EIA/JESD22-A114-B exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. Specified from −40°Cto +85°C and −40°Cto +125 °C.
DESCRIPTIONThe 74LVC1G32 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Input canbe driven from either 3.3Vor5V devices. This
feature allow the use of these devices in a mixed
3.3V and5 V environment.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall time.
This device is fully specified for partial power-down
applications using Ioff. TheIoff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G32 provides the single 2-input OR function.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 2.5 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts;= total switching outputs;
Σ(CL× VCC2×fo)= sum of the outputs. The condition is VI= GNDto VCC.
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= LOW voltage level.
ORDERING INFORMATION
PINNING
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. When VCC=0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
CHARACTERISTICSAt recommended operating conditions; voltages are referenced to GND (ground=0 V).
Philips Semiconductors Product specification
Single 2-input OR gate 74L VC1G32
Note All typical values are measured at VCC= 3.3 V and Tamb =25 °C.