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74LVC1G240DCKRG4-SN74LVC1G240DBVR-SN74LVC1G240DCKR-SN74LVC1G240DCKT Fast Delivery,Good Price
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74LVC1G240DCKRG4TIN/a9avaiSingle Inverting Buffer/Driver With 3-State Outputs 5-SC70 -40 to 125
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74LVC1G240DCKRG4-SN74LVC1G240DBVR-SN74LVC1G240DCKR-SN74LVC1G240DCKT
Single Inverting Buffer/Driver With 3-State Outputs 5-SOT-23 -40 to 125
DBV PACKAGE
(TOP VIEW)
1 VCCOEA 4GND Y
DCK PACKAGE
(TOP VIEW)
A 4GND
VCC5OE
YZP PACKAGE
(BOTTOM VIEW)
A
VCC15OE
GND 43 Y
DRY PACKAGE
(TOP VIEW)
N.C. 6GNDCC1 OE
DSF PACKAGE
(TOP VIEW)
CC
N.C.
SN74LVC1G240
www.ti.com
SCES305L –JANUARY 2001–REVISED DECEMBER 2013
Single Buffer/Driver With 3-State Output
Checkfor Samples: SN74LVC1G240
1FEATURES DESCRIPTION

This single buffer/driveris designed for 1.65-Vto 5.5- Availablein the Texas Instruments NanoFree™ V VCC operation.Package
The SN74LVC1G240isa single line driver witha3-• Supports 5-V VCC Operation state output. The outputis disabled when the output-• Inputs Accept Voltagesto 5.5V enable (OE) inputis high.• Provides Down Translationto VCC NanoFree™ package technology is a major• Max tpdof 3.7 nsat 3.3V breakthroughinIC packaging concepts, using the die• Low Power Consumption, 10-μA Max ICC as the package. ±24-mA Output Driveat 3.3V To ensure the high-impedance state during power up Ioff Supports Live Insertion, Partial-Power- or power down, OE should be tiedto VCC througha
Down Mode, and Back Drive Protection
pullup resistor; the minimum valueof the resistoris
determined by the current-sinking capability of the• Latch-Up Performance Exceeds 100 mA Per driver.JESD 78, ClassII
This deviceis fully specified for partial-power-down• ESD Protection Exceeds JESD22 applications using Ioff. The Ioff circuitry disables the– 2000-V Human-Body Model (A114-A) outputs, preventing damaging current backflow– 200-V Machine Model (A115-A) through the device whenitis powered down. 1000-V Charged-Device Model (C101)
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