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74LVC16244-74LVC16244ADGG-74LVC16244ADL-74LVCH16244ADGG-74LVCH16244ADL
16-bit buffer/line driver; 5V input/output tolerant 3-State
Product specification
Supersedes data of 1997 Jun 30
IC24 Data Handbook
1997 Oct 28
Philips Semiconductors Product specification
74LVC16244A/
74L VCH16244A
16-bit buffer/line driver; 5V input/output tolerant
(3-State)
FEATURES 5 volt tolerant inputs/outputs for interfacing with 5V logic Wide supply voltage range of 1.2V to 3.6V Complies with JEDEC standard no. 8-1A CMOS low power consumption MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum
noise and ground bounce Direct interface with TTL levels All data inputs have bus hold (74LVCH16244A only)
DESCRIPTIONThe 74LVC(H)16244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families. Inputs can be driven from either
3.3V or 5V devices. In 3-State operation, outputs can handle 5V.
These features allow the use of these devices in a mixed 3.3V/5V
environment.
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line driver with
3-State outputs. The device can be used as four 4-bit buffers, two
8-bit buffers or one 16-bit buffer. The 3-State outputs are controlled
by the output enable inputs 1OE and 2OE. A HIGH on nOE causes
the outputs to assume a high impedance OFF-state. The device can
be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 74LVC(H)16244A is identical to the 74LVC16240A but has
non-inverting outputs.
The 74LVCH16244A bus hold data inputs eliminates the need for
external pull up resistors to hold unused inputs.
PIN CONFIGURATION
ORDERING INFORMATION
QUICK REFERENCE DATAGND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
NOTES: CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
Philips Semiconductors Product specification
74LVC16244A/
74LVCH16244A
16-bit buffer/line driver; 5V input/output tolerant
(3-State)
PIN DESCRIPTION
LOGIC SYMBOL
FUNCTION TABLEH = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
LOGIC SYMBOL (IEEE/IEC)
BUSHOLD CIRCUIT
Philips Semiconductors Product specification
74LVC16244A/
74LVCH16244A
16-bit buffer/line driver; 5V input/output tolerant
(3-State)
ABSOLUTE MAXIMUM RATINGS1In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V)
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74LVC16244A/
74LVCH16244A
16-bit buffer/line driver; 5V input/output tolerant
(3-State)
DC ELECTRICAL CHARACTERISTICSOver recommended operating conditions. Voltages are referenced to GND (ground = 0V)
NOTES: All typical values are at VCC = 3.3V and Tamb = 25°C. Valid for data inputs of bus hold parts (LVCH16-A) only. For data inputs only, control inputs do not have a bus hold circuit. The specified sustaining current at the data input holds the input below the specified VI level. The specified overdrive current at the data input forces the data input to the opposite logic input state. For bus hold parts, the bus hold circuit is switched off when Vi exceeds VCC allowing 5.5V on the input terminal.
Philips Semiconductors Product specification
74LVC16244A/
74LVCH16244A
16-bit buffer/line driver; 5V input/output tolerant
(3-State)
AC CHARACTERISTICSGND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
NOTE: All typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMSVM = 1.5V at VCC � 2.7V; VM = 0.5 VCC at VCC � 2.7V.
VOL and VOH are the typical output voltage drop that occur with the output load.
VX = VOL + 0.3V at VCC � 2.7V; VX = VOL + 0.1 VCC at VCC �2.7V
VY = VOH –0.3V at VCC �2.7V; VY = VOH – 0.1 VCC at VCC �2.7V
Waveform 1. Input (An) to output (Yn) propagation delay times
TEST CIRCUIT
Waveform 3. Load circuitry for switching times
