74LVC157ABQ-74LVC157AD Fast Delivery |IC PHOENIX CO.,LIMITED

74LVC157ABQ ,74LVC157A; Quad 2-input multiplexerGeneral descriptionThe 74LVC157A is a quad 2-input multiplexer which select four bits of data from ..
74LVC157ABQ ,74LVC157A; Quad 2-input multiplexerINTEGRATED CIRCUITSDATA SHEET74LVC157AQuad 2-input multiplexerProduct speciﬁcation 2003 Dec 02Super ..
74LVC157AD ,Quad 2-input multiplexerLogic diagram5. Pinning information5.1 Pinning 74LVC157Aterminal 11 16SVCCindex area1I0 2 15 E1I0 2 ..
74LVC157ADB ,Quad 2-input multiplexerPIN CONFIGURATION PIN DESCRIPTIONPINSYMBOL FUNCTIONS 1 16 VNUMBERCC1I 2 15 E 1 S Common data select ..
74LVC157APW ,Quad 2-input multiplexerPIN CONFIGURATION PIN DESCRIPTIONPINSYMBOL FUNCTIONS 1 16 VNUMBERCC1I 2 15 E 1 S Common data select ..
74LVC161284 ,LOW VOLTAGE HIGH SPEED IEEE1284 TRANSCEIVERABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply Voltage-0.5 to +4.6 VCCV Cable Supply V ..
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74LVC157ABQ-74LVC157AD
74LVC157A; Quad 2-input multiplexer
1. General description
The 74LVC157A is a quad 2-input multiplexer which select four bits of data from two
sources under the control of a common select input (S). The four outputs present the
selected data in the true (non-inverted) form. The enable input (E) is active LOW. When
pin E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all the other
input conditions. Moving the data from two groups of registers to four common output
buses is a common use of the 74LVC157A. The state of the common data select input (S)
determines the particular register from which the data comes. It can also be used as
function generator.
It is useful for implementing highly irregular logic by generating any 4 of the 16 different
functions of two variables with one variable common.
The device is the logic implementation of a 4-pole, 2-position switch, where the position of
the switch is determined by the logic levels applied to pinS.
Inputs can be driven from either 3.3 V or5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and5 V applications.
2. Features and benefits5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65Vto 1.95V) JESD8-5A (2.3Vto 2.7V) JESD8-C/JESD36 (2.7Vto 3.6V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-B exceeds 200V CDM JESD22-C101E exceeds 1000V Specified from 40 Cto+85 C and 40 Cto+125C
74L VC157A
Quad 2-input multiplexer
Rev. 7 — 25 November 2011 Product data sheet
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
3. Ordering information
4. Functional diagram
Table 1. Ordering information
74LVC157AD 40 Cto +125C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LVC157ADB 40 Cto +125C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LVC157APW 40 Cto +125C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LVC157ABQ 40 Cto +125C DHVQFN16 plastic dual In-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
5. Pinning information
5.1 Pinning
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
5.2 Pin description
6. Functional description
[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care
Table 2. Pin description 1 common data select input
1I0 2 data input from source0
1I1 3 data input from source1 4 multiplexer output
2I0 5 data input from source0
2I1 6 data input from source1 7 multiplexer output
GND 8 ground (0V) 9 multiplexer output
3I1 10 data input from source1
3I0 11 data input from source0 12 multiplexer output
4I1 13 data input from source1
4I0 14 data input from source0 15 enable input (active LOW)
VCC 16 supply voltage
Table 3. Function table[1] XXXL
LLLX L
LLH X H X LL X H H
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO16 packages: above 70 C the value of PD derates linearly with 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of PD derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of PD derates linearly with 4.5 mW/K.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground=0V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI <0 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO >VCC or VO <0 - 50 mA output voltage [2] 0.5 VCC +0.5 V output current VO =0V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40C to +125C [3] -500 mW
Table 5. Recommended operating conditions
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall
rate
VCC= 1.65Vto 2.7V 0 - 20 ns/V
VCC= 2.7Vto 3.6V 0 - 10 ns/V
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
9. Static characteristics
[1] All typical values are measured at VCC=3.3 V (unless stated otherwise) and Tamb =25C.
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65  VCC- - 0.65  VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35  VCC -0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage =VIHorVIL= 100 A;
VCC =1.65Vto3.6V
VCC 0.2 - - VCC 0.3 - V= 4mA; VCC = 1.65 V 1.2 - - 1.05 - V= 8mA; VCC = 2.3V 1.8 - - 1.65 - V= 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V= 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V= 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage =VIHorVIL= 100 A;
VCC= 1.65Vto 3.6 V - 0.2 - 0.3 V =4mA; VCC = 1.65 V - - 0.45 - 0.65 V =8mA; VCC = 2.3V - - 0.6 - 0.8 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V input leakage
current
VCC = 3.6 V; VI =5.5V orGND- 0.1 5- 20 A
ICC supply
current
VCC = 3.6 V; VI =VCCor GND; =0A
-0.1 10 -40 A
ICC additional
supply
current
per input pin;
VCC= 2.7Vto 3.6V; =VCC 0.6 V; IO =0A 5 500 - 5000 A input
capacitance
VCC= 0 V to 3.6V; =GNDto VCC 5.0 -- -pF
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
10. Dynamic characteristics
[1] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fiN+ (CL VCC2fo) where:= input frequency in MHz; fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in V= number of inputs switching
(CL VCC2fo)= sum of outputs
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground=0 V). For test circuit see Figure9.
tpd propagation delay nI0, nI1to nY; see Figure8 [2]
VCC = 1.2 V - 16 - - - ns
VCC = 1.65 V to 1.95 V 1.0 4.8 10.2 1.0 11.8 ns
VCC = 2.3 V to 2.7 V 1.5 2.8 5.8 1.5 6.7 ns
VCC = 2.7V 1.0 2.9 5.9 1.0 7.5 ns
VCC = 3.0 V to 3.6V 1.0 2.5 5.2 1.0 6.5 nsto nY; see Figure7 [2]
VCC = 1.2 V - 17 - - - ns
VCC = 1.65 V to 1.95 V 0.5 4.8 12.8 0.5 14.7 ns
VCC = 2.3 V to 2.7 V 1.5 2.8 7.2 1.5 8.3 ns
VCC = 2.7V 1.0 2.9 7.8 1.0 10.0 ns
VCC = 3.0 V to 3.6V 1.0 2.6 6.5 1.0 8.5 nsto nY; see Figure8 [2]
VCC = 1.2 V - 16 - - - ns
VCC = 1.65 V to 1.95 V 1.0 5.1 12.4 1.0 14.3 ns
VCC = 2.3 V to 2.7 V 1.5 3.0 7.0 1.5 8.1 ns
VCC = 2.7V 1.0 3.1 7.3 1.0 9.5 ns
VCC = 3.0 V to 3.6V 1.0 2.7 6.3 1.0 8.0 ns
tsk(o) output skew time VCC= 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns
CPD power dissipation
capacitance
per input; VI = GND to VCC [4]
VCC = 1.65 V to 1.95 V - 9.4 - - - pF
VCC = 2.3 V to 2.7 V - 12.8 - - - pF
VCC = 3.0 V to 3.6 V - 15.9 - - - pF
NXP Semiconductors 74LVC157A
Quad 2-input multiplexer
11. Waveforms

Partno	Mfg	Dc	Qty	Available	Descript
74LVC157ABQ	NXP/PHILIPS	N/a	33000	avai	74LVC157A; Quad 2-input multiplexer
74LVC157AD	PH	N/a	959	avai	Quad 2-input multiplexer