74LVC14AM ,LOW VOLTAGE CMOS HEX INVERTER HIGH PERFORMANCEAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74LVC14APW ,Hex inverting Schmitt-trigger with 5V tolerant inputPin configuration SO14, SSOP14 and Fig 5.
74LVC14ATTR ,LOW VOLTAGE CMOS HEX INVERTER HIGH PERFORMANCE74LVC14ALOW VOLTAGE CMOS HEX INVERTERHIGH PERFORMANCE■ 5V TOLERANT INPUTS■ HIGH SPEED: t = 5.0ns (M ..
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74LVC14AM-74LVC14ATTR
LOW VOLTAGE CMOS HEX INVERTER HIGH PERFORMANCE
1/9December 2002 5V TOLERANT INPUTS HIGH SPEED: tPD= 5.0ns (MAX.)at VCC =3V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|= IOL= 24mA (MIN)at VCC =3V PCI BUS LEVELS GUARANTEED AT24 mA BALANCED PROPAGATION DELAYS:
tPLH≅ tPHL OPERATING VOLTAGE RANGE:CC (OPR)= 1.65Vto 3.6V (1.2V Data
Retention) PIN AND FUNCTION COMPATIBLE WITH SERIES00 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM> 2000V (MIL STD 883 method 3015);> 200V
DESCRIPTIONThe 74LVC14Aisa low voltage CMOS HEX
SCHMITT INVERTER fabricated with sub-micron
silicon gate and double-layer metal wiringC2 MOS
technology.It is ideal for 1.65 to 3.6VCCoperations and low power and low noise
applications. can be interfacedto 5V signal environment for
inputsin mixed 3.3/5V system. has more speed performanceat 3.3V than 5V
AC/ACT family, combined witha lower power
consumption.
Pin configuration and function are the same as
thoseof the 74LVC04A but the 74LVC14A has
hysteresis between the positive and negative
input threshold typicallyof 700mV.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVC14ALOW VOLTAGE CMOS HEX INVERTER
HIGH PERFORMANCE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LVC14A2/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION TRUTH TABLE
74LVC14A3/9
ABSOLUTE MAXIMUM RATINGSAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not impliedIO absolute maximum rating mustbe observedVO
RECOMMENDED OPERATING CONDITIONS Truth Table guaranteed: 1.2Vto 3.6V
74LVC14A
4/9 SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS Numberof output definedas"n". Measured with "n-1" outputs switching from HIGHto LOWor LOWto HIGH. The remaining outputis
measuredinthe LOW state.
74LVC14A
5/9 ELECTRICAL CHARACTERISTICS Skewis defined astheabsolute value ofthedifference betweenthe actual propagation delayfor anytwo outputsofthe samedevice switch-
inginthe same direction, either HIGHor LOW (tOSLH =|tPLHm -tPLHn|, tOSHL =|tPHLm -tPHLn| Parameter guaranteedby design
CAPACITIVE CHARACTERISTICS CPD isdefinedasthe valueofthe IC’s internal equivalent capacitance whichis calculatedfrom theoperating current consumption without
load.(Referto Test Circuit). Average operatingcurrentcanbe obtainedbythe followingequation. ICC(opr) =CPD xVCCxfIN+ICC/n (per circuit)
74LVC14A
6/9
TEST CIRCUIT =ZOUTof pulse generator (typically 50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle)
