74LVC11D Fast Delivery |IC PHOENIX CO.,LIMITED

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74LVC11D
Triple 3-input AND gate
1. General description
The 74LVC11 provides three 3-input AND functions.
2. Features and benefits Wide supply voltage range from 1.2 Vto 3.6V Inputs accept voltages up to 5.5V CMOS low power consumption Direct interface with TTL levels Complies with JEDEC standard: JESD8-7A (1.65Vto 1.95V) JESD8-5A (2.3Vto 2.7V) JESD8-C/JESD36 (2.7Vto 3.6V) ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-B exceeds 200V CDM JESD22-C101E exceeds 1000V Specified from 40 Cto+85C and 40 Cto+125C
3. Ordering information
74L VC11
Triple 3-input AND gate
Rev. 6 — 17 November 2011 Product data sheet
Table 1. Ordering information
74LVC11D 40 Cto +125C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LVC11DB 40 Cto +125C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LVC11PW 40 Cto +125C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LVC11BQ 40 Cto +125C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.53 0.85 mm
SOT762-1
NXP Semiconductors 74LVC11
Triple 3-input AND gate
4. Functional diagram
5. Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description
1A, 2A, 3A 1, 3, 9 data input
1B, 2B, 3B 2, 4, 10 data input
NXP Semiconductors 74LVC11
Triple 3-input AND gate
6. Functional description
[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: above 70 C the value of PD derates linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 C the value of PD derates linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 C the value of PD derates linearly with 4.5 mW/K. , 2Y, 3Y 12, 6, 8 data output
GND 7 ground (0V)
VCC 14 supply voltage
Table 2. Pin description …continued
Table 3. Function selection[1]
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA input voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA output voltage [2] 0.5 VCC + 0.5 V output current VO = 0 V to VCC - 50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 C to +125 C [3] -500 mW
Tstg storage temperature 65 +150 C
NXP Semiconductors 74LVC11
Triple 3-input AND gate
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall
rate
VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level
input voltage
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65  VCC - - 0.65  VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35  VCC -0.35  VCCV
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage =VIHorVIL= 100 A;
VCC =1.65Vto3.6V
VCC 0.2 - - VCC 0.3 - V= 4mA; VCC = 1.65 V 1.2 - - 1.05 - V= 8mA; VCC = 2.3V 1.8 - - 1.65 - V= 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V= 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V= 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage =VIHorVIL= 100 A;
VCC= 1.65Vto 3.6 V - 0.2 - 0.3 V =4mA; VCC = 1.65 V - - 0.45 - 0.65 V =8mA; VCC = 2.3V - - 0.6 - 0.8 V =12mA; VCC = 2.7 V - - 0.4 - 0.6 V =24mA; VCC = 3.0 V - - 0.55 - 0.8 V input leakage
current
VCC = 3.6 V; VI =5.5V orGND - 0.1 5- 20 A
NXP Semiconductors 74LVC11
Triple 3-input AND gate
[1] All typical values are measured at VCC=3.3 V (unless stated otherwise) and Tamb =25C.
10. Dynamic characteristics
[1] Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where: = input frequency in MHz; fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in Volts= number of inputs switching
(CL VCC2fo)= sum of the outputs
ICC supply
current
VCC = 3.6 V; VI =VCCor GND; =0A
-0.1 10 - 40 A
ICC additional
supply
current
per input pin;
VCC= 2.7Vto 3.6V; =VCC 0.6 V; IO =0A 5 500 - 5000 A input
capacitance
VCC= 0 V to 3.6V; =GNDto VCC
-5.0 - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground=0 V). For test circuit see Figure7.
tpd propagation delay nA, nB, nC to nY; see Figure6 [2]
VCC = 1.2 V - 14.0 - - - ns
VCC = 1.65 V to 1.95 V 1.0 4.7 12.2 1.0 14.1 ns
VCC = 2.3 V to 2.7 V 1.5 2.8 6.9 1.5 8.0 ns
VCC = 2.7 V 1.5 2.9 7.0 1.5 8.1 ns
VCC = 3.0 V to 3.6 V 1.5 2.5 6.2 1.5 7.2 ns
CPD power dissipation
capacitance
per gate; VI =GNDto VCC [3]
VCC = 1.65 V to 1.95 V - 3.1 - - - pF
VCC = 2.3 V to 2.7 V - 6.2 - - - pF
VCC = 3.0 V to 3.6 V - 9.0 - - - pF
NXP Semiconductors 74LVC11
Triple 3-input AND gate
11. AC waveforms
Table 8. Test data
1.2V VCC  2 ns 30pF 1 k
1.65Vto 1.95V VCC  2 ns 30pF 1 k
2.3Vto 2.7V VCC  2 ns 30pF 500
2.7 V 2.7V  2.5ns 50pF 500
3.0Vto 3.6V 2.7V  2.5ns 50pF 500
NXP Semiconductors 74LVC11
Triple 3-input AND gate
12. Package outline

Partno	Mfg	Dc	Qty	Available	Descript
74LVC11D	NXP	N/a	55	avai	Triple 3-input AND gate