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74LV4051PWNXPN/a297avai8-channel analog multiplexer/demultiplexer
74LV4051PWN/a25000avai8-channel analog multiplexer/demultiplexer


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74LV4051PW
8-channel analog multiplexer/demultiplexer
General descriptionThe 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select
inputs (S0to S2),an active-LOW enable input (E), eight independent inputs/outputs (Y0to
Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin
and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight
switchesis selected (low impedance ON-state)byS0to S2. WithE HIGH,all switches are
in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between VCCasa positive limit and VEEasa negative limit. VCC− VEE may not
exceed 6.0V . For operation as a digital multiplexer/demultiplexer, VEE is connected to
GND (typically ground). Features Optimized for low-voltage applications: 1.0 V to 6.0V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6V Low ON resistance: 145 Ω (typical) at VCC − VEE= 2.0 V 80 Ω (typical) at VCC − VEE= 3.0 V 60 Ω (typical) at VCC − VEE= 4.5 V Logic level translation: To enable 3 V logic to communicate with ±3 V analog signals Typical ‘break before make’ built in ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from −40 °Cto+85 °C and from −40°Cto +125°C
74L V4051
8-channel analog multiplexer/demultiplexer
Rev. 04 — 10 August 2009 Product data sheet
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer Ordering information Functional diagram
Table 1. Ordering information

74LV4051N −40°Cto +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV4051D −40°Cto +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LV4051DB −40°Cto +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LV4051PW −40°Cto +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LV4051BQ −40°Cto +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5× 3.5× 0.85 mm
SOT763-1
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description
6 enable input (active LOW)
VEE 7 supply voltage
GND 8 ground supply voltage
S0, S1, S2 11, 10, 9 select input
Y0, Y1, Y2, Y3, Y4, Y5, Y6,Y7 13, 14, 15, 12,1,5,2,4 independent input or output 3 common output or input
VCC 16 supply voltage
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer Functional description
6.1 Function table

[1]H= HIGH voltage level;= LOW voltage level;= don’t care. Limiting values
[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.
[2] The minimum input voltage rating may be exceeded if the input current rating is observed.
[3] For DIP16 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K.
For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K.
Table 3. Function table[1]

LLLLY0toZ
LLLH Y1toZ
LLH LY2toZ L HHY3toZ LLY4toZ H L H Y5toZ H H L Y6toZ HHHY7toZ XXXswitches off
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
VCC supply voltage [1] −0.5 +7.0 V
IIK input clamping current VI< −0.5 V or VI > VCC + 0.5V [2]- ±20 mA
ISK switch clamping current VSW< −0.5 V or VSW > VCC + 0.5V [2]- ±20 mA
ISW switch current VSW> −0.5 VorVSW sourceor sink current
[2]- ±25 mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C [3]
DIP16 package - 750 mW
SO16 package - 500 mW
TSSOP16 package - 500 mW
DHVQFN16 package - 500 mW
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer Recommended operating conditions

[1] The static characteristicsare guaranteed from VCC=1.2Vto6.0V,butLV devicesare guaranteedto function downto VCC=1.0V (with
input levels GND or VCC).
Table 5. Recommended operating conditions[1]

VCC supply voltage see Figure8 1 3.3 6 V input voltage 0 - VCC V
VSW switch voltage 0 - VCC V
Tamb ambient temperature in free air −40 - +125 °C
Δt/ΔV input transition rise and fall rate VCC= 1.0 V to 2.0V - - 500 ns/V
VCC= 2.0 V to 2.7V - - 200 ns/V
VCC= 2.7 V to 3.6V - - 100 ns/V
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer Static characteristics

[1] Typical values are measured at Tamb = 25°C.
Table 6. Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - 0.9 - V
VCC = 2.0 V 1.4 - - 1.4 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V 3.15 - - 3.15 - V
VCC = 6.0 V 4.20 - - 4.20 - V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 - 0.3 V
VCC = 2.0 V - - 0.6 - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V - - 1.35 - 1.35 V
VCC = 6.0 V - - 1.80 - 1.80 V input leakage current VI =VCCor GND
VCC= 3.6V - - 1.0 - 1.0 μA
VCC= 6.0V - - 2.0 - 2.0 μA
IS(OFF) OFF-state leakage current VI = VIH or VIL; see Figure9
VCC = 3.6V - - 1.0 - 1.0 μA
VCC = 6.0V - - 2.0 - 2.0 μA
IS(ON) ON-state leakage current VI = VIH or VIL; see Figure10
VCC = 3.6V - - 1.0 - 1.0 μA
VCC = 6.0V - - 2.0 - 2.0 μA
ICC supply current VI = VCC or GND; IO = 0A
VCC = 3.6V - - 20 - 40 μA
VCC = 6.0V - - 40 - 80 μA
ΔICC additional supply current per input; VI = VCC − 0.6V;
VCC= 2.7Vto 3.6V - 500 - 850 μA input capacitance - 3.5 - - - pF
Csw switch capacitance independent pins Yn - 5 - - - pF
common pin Z - 25 - - - pF
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer
9.1 Test circuits
9.2 ON resistance
Table 7. ON resistance

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 11 and
Figure 12.
RON(peak) ON resistance (peak) VI = 0 V to VCC − VEE
VCC= 1.2 V; ISW= 100μA [2] -- - - - Ω
VCC= 2.0V; ISW= 1000μA - 145 325 - 375 Ω
VCC= 2.7V; ISW= 1000μA - 90 200 - 235 Ω
VCC= 3.0 V to 3.6 V;
ISW= 1000μA 80 180 - 210 Ω
VCC= 4.5V; ISW= 1000μA - 60 135 - 160 Ω
VCC= 6.0V; ISW= 1000μA - 55 125 - 145 Ω
ΔRON ONresistance mismatch
between channels
VI = 0 V to VCC − VEE
VCC= 1.2 V; ISW= 100μA [2] -- - - - Ω
VCC= 2.0V; ISW= 1000 μA- 5 - - - Ω
VCC= 2.7V; ISW= 1000 μA- 4 - - - Ω
VCC= 3.0 V to 3.6 V;
ISW= 1000μA - - - Ω
VCC= 4.5V; ISW= 1000 μA- 3 - - - Ω
VCC= 6.0V; ISW= 1000 μA- 2 - - - Ω
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer

[1] Typical values are measured at Tamb =25°C.
[2] When supply voltages (VCC− VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of
1.2 V, it is recommended to use these devices only for transmitting digital signals.
RON(rail) ON resistance (rail) VI = GND
VCC= 1.2 V; ISW= 100μA [2] - 225 - - - Ω
VCC= 2.0V; ISW= 1000μA - 110 235 - 270 Ω
VCC= 2.7V; ISW= 1000μA - 70 145 - 165 Ω
VCC= 3.0 V to 3.6 V;
ISW= 1000μA 60 130 - 150 Ω
VCC= 4.5V; ISW= 1000μA - 45 100 - 115 Ω
VCC= 6.0V; ISW= 1000μA - 40 85 - 100 Ω
RON(rail) ON resistance (rail) VI = VCC − VEE
VCC= 1.2 V; ISW= 100μA [2] - 250 - - - Ω
VCC= 2.0V; ISW= 1000μA - 120 320 - 370 Ω
VCC= 2.7V; ISW= 1000μA - 75 195 - 225 Ω
VCC= 3.0 V to 3.6 V;
ISW= 1000μA 70 175 - 205 Ω
VCC= 4.5V; ISW= 1000μA - 50 130 - 150 Ω
VCC= 6.0V; ISW= 1000μA - 45 120 - 135 Ω
Table 7. ON resistance …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 11 and
Figure 12.
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer
9.3 On resistance waveform and test circuit
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer
10. Dynamic characteristics
Table 8. Dynamic characteristics

Voltages are referenced to GND (ground=0 V). For test circuit see Figure 15.
tpd propagation delay Yn to Z, Z to Yn; see Figure13 [2]
VCC= 1.2V - 25 - - - ns
VCC= 2.0V - 9 17 - 20 ns
VCC= 2.7V - 6 13 - 15 ns
VCC= 3.0 V to 3.6 V [3] - 5 10 - 12 ns
VCC= 4.5V - 4 9 - 10 ns
VCC= 6.0V - 3 8 - 8 ns
ten enable time Eto Yn, Z; see Figure14 [2]
VCC= 1.2V - 145 - - - ns
VCC= 2.0V - 49 94 - 112 ns
VCC= 2.7V - 36 69 - 83 ns
VCC= 3.0Vto 3.6V;CL =15pF[3] -23 - - - ns
VCC= 3.0 V to 3.6 V [3] - 28 55 - 66 ns
VCC= 4.5V - 25 47 - 56 ns
VCC= 6.0V - 19 38 - 43 ns
Sn to Yn; see Figure14 [2]
VCC= 1.2V - 140 - - - ns
VCC= 2.0V - 48 90 - 107 ns
VCC= 2.7V - 35 66 - 79 ns
VCC= 3.0Vto 3.6V;CL =15pF[3] -22 - - - ns
VCC= 3.0 V to 3.6 V [3] - 27 53 - 63 ns
VCC= 4.5V - 24 45 - 54 ns
VCC= 6.0V - 18 34 - 41 ns
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer

[1] All typical values are measured at Tamb =25°C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3V).
[4] CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ((CL + CSW) × VCC2×fo) where: = input frequency in MHz, fo= output frequency in MHz= output load capacitance inpF
CSW= maximum switch capacitance in pF;
VCC= supply voltage in Volts= number of inputs switching
Σ(CL× VCC2×fo)= sum of the outputs.
tdis disable time Eto Yn, Z; see Figure14 [2]
VCC= 1.2V - 145 - - - ns
VCC= 2.0V - 51 93 - 110 ns
VCC= 2.7V - 38 69 - 82 ns
VCC= 3.0Vto 3.6V;CL =15pF[3] -25 - - - ns
VCC= 3.0 V to 3.6 V [3] - 30 56 - 66 ns
VCC= 4.5V - 29 48 - 56 ns
VCC= 6.0V - 21 37 - 44 ns
Sn to Yn; see Figure14 [2]
VCC= 1.2V - 115 - - - ns
VCC= 2.0V - 41 73 - 90 ns
VCC= 2.7V - 31 54 - 67 ns
VCC= 3.0Vto 3.6V;CL =15pF[3] -20 - - - ns
VCC= 3.0 V to 3.6 V [3] - 24 44 - 54 ns
VCC= 4.5V - 22 37 - 46 ns
VCC= 6.0V - 17 29 - 36 ns
CPD power dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[4] -25 - - - pF
Table 8. Dynamic characteristics …continued

Voltages are referenced to GND (ground=0 V). For test circuit see Figure 15.
NXP Semiconductors 74L V4051
8-channel analog multiplexer/demultiplexer
10.1 Waveforms
Table 9. Measurement points

< 2.7 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH − 0.1VCC
2.7 V to 3.6V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V
> 3.6 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH − 0.1VCC
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