74LV4020D-74LV4020N Fast Delivery |IC PHOENIX CO.,LIMITED

74LV4020D ,14-stage binary ripple counterApplications■ Frequency dividing circuits■ Time delay circuits■ Control counters74LV4020Philips Sem ..
74LV4020N ,14-stage binary ripple counterGeneral descriptionThe 74LV4020 is a low-voltage Si-gate CMOS device and is pin and function compat ..
74LV4051D ,8-channel analog multiplexer/demultiplexerFEATURES DESCRIPTIONThe 74LV4051 is a low-voltage CMOS device and is pin and• Optimized for low vol ..
74LV4051PW ,8-channel analog multiplexer/demultiplexerapplications: 1.0 to 6.0 Vfunction compatible with the 74HC/HCT4051.• Accepts TTL input levels betw ..
74LV4051PW ,8-channel analog multiplexer/demultiplexerINTEGRATED CIRCUITS74LV40518-channel analogmultiplexer/demultiplexerProduct specification 1998 Jun ..
74LV4051PW ,8-channel analog multiplexer/demultiplexer74LV40518-channel analog multiplexer/demultiplexerRev. 04 — 10 August 2009 Product data sheet1.
7WBD3125USG , 2-Bit Translating Bus Switch
8.192 , 64-Pin 8-Bit Flash Microcontroller Product Brief
8.192 , 64-Pin 8-Bit Flash Microcontroller Product Brief
80021012A ,Octal Bus Transceivers With 3-State OutputsLogic Diagram (Positive Logic)1DIR19OE2A118B1To Seven Other ChannelsCopyright 2016, Texas Instrume ..
8035AHL , HMOS SINGLE-COMPONENT 8-BIT MICROCONTROLLER
8041-05-011 , DIP Reed Relays

74LV4020D-74LV4020N
14-stage binary ripple counter
General descriptionThe 74LV4020 is a low-voltage Si-gate CMOS device and is pin and function compatible
with the 74HC4020 and 74HCT4020.
The 74LV4020 is a 14-stage binary ripple counter with a clock input (CP), an overriding
asynchronous master reset input (MR) and 12 fully buffered parallel outputs (Q0, and to Q13).
The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all
counter stages and forces all outputs LOW, independent of the state of CP.
Each counter stage is a static toggle ﬂip-ﬂop. Features Optimized for low-voltage applications: 1.0 V to 5.5V Accepts TTL input levels between VCC= 2.7 V and VCC= 3.6V Typical LOW-level output voltage (peak) or output ground bounce: VOL(p)< 0.8 V at
VCC= 3.3 V and Tamb =25°C Typical HIGH-level output voltage (valley) or output VOH undershoot: VOH(v) >2V at
VCC= 3.3 V and Tamb =25°C ESD protection: HBM EIA/JESD22-A114-C exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. Multiple package options Speciﬁed from −40 °C to +80 °C and from −40 °C to +125 °C. Applications Frequency dividing circuits Time delay circuits Control counters
74L V4020
14-stage binary ripple counter
Philips Semiconductors 74L V4020 Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ ∑(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
∑(CL× VCC2×fo) = sum of outputs. Ordering information
Table 1: Quick reference data
GND=0 V; Tamb =25 °C; tr =tf= 2.5ns.
tPHL,
tPLH
propagation delay CL=15 pF; VCC= 3.3V
CP to Q0 - 12 - ns
Qn to Q(n+1) - 7 - ns
tPHL propagation delay CL=15 pF; VCC= 3.3V
MR to Qn - 16 - ns
fmax maximum input clock
frequency=15 pF; VCC= 3.3V - 100 - MHz input capacitance - 3.5 - pF
CPD power dissipation
capacitance
per gate; VI= GND to
VCC
[1] -20 - pF
Table 2: Ordering information
74LV4020N −40 °C to +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV4020D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LV4020DB −40 °C to +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LV4020PW −40 °C to +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
Philips Semiconductors 74L V4020 Functional diagram
Philips Semiconductors 74L V4020 Pinning information
7.1 Pinning
7.2 Pin description
Table 3: Pin description
Q11 1 parallel output 11
Q12 2 parallel output 12
Q13 3 parallel output 13 4 parallel output 5 5 parallel output 4 6 parallel output 6 7 parallel output 3
GND 8 ground (0 V) 9 parallel output 0 10 clock input (HIGH-to-LOW, edge-triggered) 11 master reset input (active HIGH) 12 parallel output 8 13 parallel output 7 14 parallel output 9
Q10 15 parallel output 10
VCC 16 supply voltage
Philips Semiconductors 74L V4020 Functional description
8.1 Function table
[1]H= HIGH voltage level;= LOW voltage level;= don’t care;= LOW-to-HIGH clock transition;= HIGH-to-LOW clock transition.
8.1.1 Timing diagram
Table 4: Function table[1] L no change L count L
Philips Semiconductors 74L V4020 Limiting values
[1] Above Tamb =70 °C: Ptot derates linearly with 12 mW/K.
[2] Above Tamb =70 °C: Ptot derates linearly with 8 mW/K.
[3] Above Tamb =60 °C: Ptot derates linearly with 5.5 mW/K.
10. Recommended operating conditions
[1] The static characteristicsare guaranteed from VCC=1.2Vto VCC=5.5V,butLV devicesare guaranteedto
function down to VCC = 1.0 V (with input levels GND or VCC).
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
VCC supply voltage −0.5 +7 V
IIK input clamping current VI < −0.5 V or VI > VCC + 0.5V - ±20 mA
IOK output clamping current VO < −0.5 V or >VCC+ 0.5V ±50 mA output current VO = −0.5 V to VCC + 0.5V - ±25 mA
ICC quiescent supply current - 50 mA
IGND ground current - −50 mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C
DIP16 package [1]- 750 mW
SO16 package [2]- 500 mW
SSOP16 and
TSSOP16 packages
[3]- 400 mW
Table 6: Recommended operating conditions
VCC supply voltage [1] 1.0 3.3 5.5 V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature −40 - +125 °C
Δt/ΔV input transition rise and
fall rate
VCC = 1.0 V to 2.0V - - 500 ns/V
VCC = 2.0 V to 2.7V - - 200 ns/V
VCC = 2.7 V to 3.6V - - 100 ns/V
VCC = 3.6 V to 5.5V - - 50 ns/V
Philips Semiconductors 74L V4020
11. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb = −40 °C to +85°C[1]
VIH HIGH-state input voltage VCC = 1.2V 0.9 - - V
VCC = 2.0V 1.4 - - V
VCC = 2.7 V to 3.6V 2.0 - - V
VCC = 4.5 V to 5.5V 0.7× VCC -- V
VIL LOW-state input voltage VCC = 1.2V - - 0.3 V
VCC = 2.0V - - 0.6 V
VCC = 2.7 V to 3.6V - - 0.8 V
VCC = 4.5 V to 5.5V - - 0.3× VCCV
VOH HIGH-state output voltage VI = VIH or VIL
IO = −100 μA; VCC = 1.2V - 1.2 - V
IO = −100 μA; VCC = 2.0V 1.8 2.0 - V
IO = −100 μA; VCC = 2.7V 2.5 2.7 - V
IO = −100 μA; VCC = 3.0V 2.8 3.0 - V
IO = −100 μA; VCC = 4.5V 4.3 4.5 - V
IO =−6 mA; VCC = 3.0V 2.40 2.82 - V
IO = −12 mA; VCC = 4.5V 3.60 4.20 - V
VOL LOW-state output voltage VI = VIH or VIL
IO = 100 μA; VCC = 1.2V - 0 - V
IO = 100 μA; VCC = 2.0V - 0 0.2 V
IO = 100 μA; VCC = 2.7V - 0 0.2 V
IO = 100 μA; VCC = 3.0V - 0 0.2 V
IO = 100 μA; VCC = 4.5V - 0 0.2 V
IO = 6 mA; VCC = 3.0V - 0.25 0.40 V
IO = 12 mA; VCC = 4.5V - 0.35 0.55 V
ILI input leakage current VI = VCC or GND; VCC = 5.5V - - 1.0 μA
ICC quiescent supply current VI = VCC or GND; IO = 0A;
VCC= 5.5V - 20.0 μA
ΔICC additional quiescent supply
current
per input; VI = VCC − 0.6V;
VCC= 2.7 V to 3.6V - 500 μA input capacitance - 3.5 - pF
Tamb = −40 °C to +125°C
VIH HIGH-state input voltage VCC = 1.2V 0.9 - - V
VCC = 2.0V 1.4 - - V
VCC = 2.7 V to 3.6V 2.0 - - V
VCC = 4.5 V to 5.5V 0.7× VCC -- V
Philips Semiconductors 74L V4020
[1] All typical values are measured at Tamb = 25°C.
VIL LOW-state input voltage VCC = 1.2V - - 0.3 V
VCC = 2.0V - - 0.6 V
VCC = 2.7 V to 3.6V - - 0.8 V
VCC = 4.5 V to 5.5V - - 0.3× VCCV
VOH HIGH-state output voltage VI = VIH or VIL
IO = −100 μA; VCC = 1.2V - - - V
IO = −100 μA; VCC = 2.0V 1.8 - - V
IO = −100 μA; VCC = 2.7V 2.5 - - V
IO = −100 μA; VCC = 3.0V 2.8 - - V
IO = −100 μA; VCC = 4.5V 4.3 - - V
IO =−6 mA; VCC = 3.0V 2.20 - - V
IO = −12 mA; VCC = 4.5V 3.50 - - V
VOL LOW-state output voltage VI = VIH or VIL
IO = 100 μA; VCC = 1.2V - - - V
IO = 100 μA; VCC = 2.0V - - 0.2 V
IO = 100 μA; VCC = 2.7V - - 0.2 V
IO = 100 μA; VCC = 3.0V - - 0.2 V
IO = 100 μA; VCC = 4.5V - - 0.2 V
IO = 6 mA; VCC = 3.0V - - 0.50 V
IO = 12 mA; VCC = 4.5V - - 0.65 V
ILI input leakage current VI = VCC or GND; VCC = 5.5V - - 1.0 μA
ICC quiescent supply current VI = VCC or GND; IO = 0A;
VCC= 5.5V - 160 μA
ΔICC additional quiescent supply
current
per input; VI = VCC − 0.6V;
VCC= 2.7 V to 3.6V - 850 μA
Table 7: Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors 74L V4020
12. Dynamic characteristics
Table 8: Dynamic characteristics
Voltages are referenced to GND (ground =0 V); CL = 50 pF; for test circuit see Figure9.
Tamb = −40 °C to +85°C[1]
tPHL,
tPLH
propagation delay
CP to Q0 see Figure7
VCC = 1.2V - 60 - ns
VCC = 2.0V - 27 43 ns
VCC = 2.7V - 19 31 ns
VCC = 3.0 V to 3.6V - 16 26 ns
VCC = 4.5 V to 5.5V - 11 17 ns
VCC = 3.3 V; CL = 15pF - 12 - ns
Qn to Q(n+1) see Figure7
VCC = 1.2V - 40 - ns
VCC = 2.0V - 18 29 ns
VCC = 2.7V - 13 21 ns
VCC = 3.0 V to 3.6V - 11 18 ns
VCC = 4.5 V to 5.5V - 7 12 ns
VCC = 3.3 V; CL = 15pF - 7 - ns
tPHL propagation delay
MR to Qn see Figure8
VCC = 1.2V - 55 - ns
VCC = 2.0V - 27 44 ns
VCC = 2.7V - 19 31 ns
VCC = 3.0 V to 3.6V - 16 26 ns
VCC = 4.5 V to 5.5V - 11 17 ns
VCC = 3.3 V; CL = 15pF - 16 - ns pulse width
CP (HIGH and LOW) see Figure7
VCC = 2.0V 35 7 - ns
VCC = 2.7V 25 5 - ns
VCC = 3.0 V to 3.6V 20 4 - ns
VCC = 4.5 V to 5.5V 15 3 - ns
MR (HIGH) see Figure8
VCC = 2.0V 35 11 - ns
VCC = 2.7V 25 9 - ns
VCC = 3.0 V to 3.6V 20 8 - ns
VCC = 4.5 V to 5.5V 15 7 - ns
Philips Semiconductors 74L V4020
trec recovery time
MR to CP see Figure8
VCC = 1.2V - 10 - ns
VCC = 2.0V 22 5 - ns
VCC = 2.7V 16 4 - ns
VCC = 3.0 V to 3.6V 13 3 - ns
VCC = 4.5 V to 5.5V 10 2 - ns
fmax maximum input clock frequency see Figure7
VCC = 2.0V 14 60 - MHz
VCC = 2.7V 19 76 - MHz
VCC = 3.0 V to 3.6V 24 94 - MHz
VCC = 4.5 V to 5.5V 36 112 - MHz
VCC= 3.3 V; CL = 15pF - 100 - MHz
CPD power dissipation capacitance per gate; VI = GND to VCC [2] -20 - pF
Tamb = −40 °C to +125°C
tPHL,
tPLH
propagation delay
CP to Q0 see Figure7
VCC = 1.2V ---ns
VCC = 2.0V - - 54 ns
VCC = 2.7V - - 38 ns
VCC = 3.0 V to 3.6V - - 32 ns
VCC = 4.5 V to 5.5V - - 22 ns
Qn to Q(n+1) see Figure7
VCC = 1.2V ---ns
VCC = 2.0V - - 37 ns
VCC = 2.7V - - 26 ns
VCC = 3.0 V to 3.6V - - 22 ns
VCC = 4.5 V to 5.5V - - 15 ns
tPHL propagation delay
MR to Qn see Figure8
VCC = 1.2V ---ns
VCC = 2.0V - - 55 ns
VCC = 2.7V - - 39 ns
VCC = 3.0 V to 3.6V - - 32 ns
VCC = 4.5 V to 5.5V - - 22 ns
Table 8: Dynamic characteristics …continued
Voltages are referenced to GND (ground =0 V); CL = 50 pF; for test circuit see Figure9.

Partno	Mfg	Dc	Qty	Available	Descript
74LV4020D	PHI	N/a	670	avai	14-stage binary ripple counter
74LV4020N	PHI	N/a	32	avai	14-stage binary ripple counter