74LV165APW ,74LV165A; 8-bit parallel-in/serial-out shift registerINTEGRATED CIRCUITSDATA SHEET74LV165A8-bit parallel-in/serial-out shiftregisterProduct specification ..
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74LV165A-74LV165APW
74LV165A; 8-bit parallel-in/serial-out shift register
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74L V165A
FEATURES Wide supply voltage range from 2.0to 5.5V Complies with JEDEC standard:
JESD8-5 (2.3to 2.7V)
JESD8B/JESD36 (2.7to 3.6V)
JESD8-1A (4.5to 5.5 V). 5.5 V tolerant inputs/outputs CMOS LOW power consumption Direct interface with TTL levels (2.7to 3.6V) Power-down mode Asynchronous 8-bit parallel load Synchronous serial input Latch-up performance exceeds 250 mA ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V
MM EIA/JESD22-A115-A exceeds 200V.
DESCRIPTIONThe 74LV165A is a high-performance, low-power,
low-voltage, Is-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall times.
This device is fully specified for partial-power-down
applications using Ioff. TheIoff circuitry disables the output,
preventing the damaging current back flow through the
device when it is powered down.
The 74LV165A is an 8-bit parallel-load or serial-in shift
register with complementary serial outputs (Q7 and Q7)
available from the last stage. When the parallel-load input
(PL) is LOW, parallel data from the inputs D0 to D7 are
loaded into the register asynchronously. When inputPLis
HIGH, data enters the register seriallyat the input DS and
shifts one placeto the right (Q0→Q1→Q2, etc.) with each
positive-going clock transition. This feature allows
parallel-to-serial converter expansion by tying the output
Q7 to the input DS of the succeeding stage.
The clock input is a gate-OR structure which allows one
inputtobe usedasan active LOW clock enable input (CE)
input. The pin assignment for the inputs CP and CE is
arbitrary and canbe reversedfor layout convenience. The
LOW-to-HIGH transition of the input CE should only take
place while CP HIGH for predictable operation.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts;= total load switching outputs;
Σ(CL× VCC2×fo)= sum of the outputs. The condition is Vi= GNDto VCC.
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
ORDERING INFORMATION
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;= LOW voltage level;= LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;= state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition;= don’t care;= LOW-to-HIGH clock transition.
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
PINNING
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO16 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
CHARACTERISTICSAt recommended operating conditions; voltages are referenced to GND (ground=0V).
Note All typical values are measured at VCC= 5.5 V and Tamb =25 °C.
Philips Semiconductors Product specification
8-bit parallel-in/serial-out shift register 74LV165A
CHARACTERISTICSGND=0 V; tr =tf≤ 3.0 ns.
