74LV14D Fast Delivery |IC PHOENIX CO.,LIMITED

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74LV14D
Hex inverting Schmitt trigger
1. General description
The 74LV14 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC14 and 74HCT14.
The 74LV14 provides six inverting buffers with Schmitt-trigger input. It is capable of
transforming slowly-changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT is defined as the input
hysteresis voltage VH.
2. Features and benefits Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb= 25 C ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125C
3. Applications Wave and pulse shapers for highly noisy environments Astable multivibrators Monostable multivibrators
74L V14
Hex inverting Schmitt trigger
Rev. 6 — 12 December 2011 Product data sheet
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
4. Ordering information
5. Functional diagram
Table 1. Ordering information
74LV14N 40 Cto+125C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV14D 40 Cto+125C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LV14DB 40 Cto+125C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
74LV14PW 40 Cto+125C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74LV14BQ 40 Cto+125C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.53 0.85 mm
SOT762-1
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 2. Pin description 1 data input 2 data output 3 data input 4 data output 5 data input 6 data output
GND 7 ground (0V) 8 data output 9 data input 10 data output 11 data input 12 data output 13 data input
VCC 14 supply voltage
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
7. Functional description
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 12 mW/K above 70C.
[3] Ptot derates linearly with 8 mW/K above 70C.
[4] Ptot derates linearly with 5.5 mW/K above 60C.
[5] Ptot derates linearly with 4.5 mW/K above 60C.
9. Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC=1.0 V (with input levels GND or VCC).
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V orVI >VCC +0.5V [1]- 20 mA
IOK output clamping current VO< 0.5 V orVO >VCC +0.5V [1]- 50 mA output current VO = 0.5 V to (VCC +0.5V) - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125C
DIP14 package [2]- 750 mW
SO14 package [3]- 500 mW
(T)SSOP14 package [4]- 500 mW
DHVQFN14 package [5]- 500 mW
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage [1] 1.03.3 5.5V input voltage 0 - VCC V output voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 C
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
10. Static characteristics
[1] Typical values are measured at Tamb = 25 C.
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
VOH HIGH-level output voltage VI = VT+ or VT
IO = 100 A; VCC = 1.2V - 1.2 - - - V
IO = 100 A; VCC = 2.0V 1.8 2.0 - 1.8 - V
IO = 100 A; VCC = 2.7V 2.5 2.7 - 2.5 - V
IO = 100 A; VCC = 3.0V 2.8 3.0 - 2.8 - V
IO = 100 A; VCC = 4.5V 4.3 4.5 - 4.3 - V
IO = 6 mA; VCC = 3.0V 2.4 2.82 - 2.2 - V
IO = 12 mA; VCC = 4.5V 3.6 4.2 - 3.5 - V
VOL LOW-level output voltage VI = VT+ or VT
IO = 100 A; VCC = 1.2V - 0 - - - V
IO = 100 A; VCC = 2.0V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 2.7V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 3.0V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 4.5V - 0 0.2 - 0.2 V
IO = 6 mA; VCC = 3.0V - 0.25 0.40 - 0.50 V
IO = 12 mA; VCC = 4.5V - 0.35 0.55 - 0.65 V input leakage current VI =VCCor GND;
VCC =5.5V - 1.0 - 1.0 A
ICC supply current VI = VCC or GND; IO = 0A;
VCC =5.5V - 20.0 - 40 A
ICC additional supply current per input; VI = VCC  0.6V;
VCC= 2.7Vto 3.6V 500 - 850 A input capacitance - 3.5 - - - pF
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
11. Dynamic characteristics
[1] All typical values are measured at Tamb =25C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3V).
[4] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where: = input frequency in MHz, fo= output frequency in MHz= output load capacitance inpF
VCC= supply voltage in V= number of inputs switching
(CL VCC2fo)= sum of the outputs.
12. Waveforms
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure7.
tpd propagation delay nA to nY; see Figure6 [2]
VCC = 1.2 V - 80 - - - ns
VCC = 2.0 V - 27 37 - 48 ns
VCC = 2.7 V - 20 28 - 35 ns
VCC = 3.0 V to 3.6 V; CL =15pF [3] -13 - - - ns
VCC = 3.0 V to 3.6 V [3] - 15 22 - 28 ns
VCC = 4.5 V to 5.5 V - - 18 - 23 ns
CPD power dissipation
capacitance =50pF; fi = 1 MHz; =GNDto VCC
[4] -15 - - - pF
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
13. Transfer characteristics
Table 8. Measurement points
< 2.7 V 0.5VCC 0.5VCC
2.7 V to 3.6V 1.5 V 1.5 V
 4.5 V 0.5VCC 0.5VCC
Table 9. Test data
< 2.7 V VCC  2.5 ns
2.7 V to 3.6V 2.7 V  2.5 ns
 4.5 V VCC  2.5 ns
Table 10. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure9.
VT+ positive-going
threshold voltage
VCC = 1.2 V - 0.70 - - - V
VCC = 2.0 V 0.8 1.10 1.4 0.8 1.4 V
VCC = 2.7 V 1.0 1.45 2.0 1.0 2.0 V
VCC = 3.0 V 1.2 1.60 2.2 1.2 2.2 V
VCC = 3.6 V 1.5 1.95 2.4 1.5 2.4 V
VCC = 4.5 V 1.7 2.50 3.15 1.7 3.15 V
VCC = 5.5 V 2.1 3.00 3.85 2.1 3.85 V
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger
[1] All typical values are measured at Tamb =25C.
14. Waveforms transfer characteristics
VT negative-going
threshold voltage
VCC = 1.2 V - 0.34 - - - V
VCC = 2.0 V 0.3 0.65 0.9 0.3 0.9 V
VCC = 2.7 V 0.4 0.90 1.4 0.4 1.4 V
VCC = 3.0 V 0.6 1.05 1.5 0.6 1.5 V
VCC = 3.6 V 0.8 1.30 1.8 0.8 1.8 V
VCC = 4.5 V 0.9 1.60 2.0 0.9 2.0 V
VCC = 5.5 V 1.1 2.00 2.6 1.1 2.6 V hysteresis voltage VCC = 1.2 V - 0.3 - - - V
VCC = 2.0 V 0.2 0.55 0.8 0.2 0.8 V
VCC = 2.7 V 0.3 0.60 1.1 0.3 1.1 V
VCC = 3.0 V 0.4 0.65 1.2 0.4 1.2 V
VCC = 3.6 V 0.4 0.70 1.2 0.4 1.2 V
VCC = 4.5 V 0.4 0.80 1.4 0.4 1.4 V
VCC = 5.5 V 0.6 1.00 1.5 0.6 1.5 V
Table 10. Transfer characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure9.
NXP Semiconductors 74L V14
Hex inverting Schmitt trigger

Partno	Mfg	Dc	Qty	Available	Descript
74LV14D		N/a	23	avai	Hex inverting Schmitt-trigger