74LCX86 ,Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant InputsFeaturesThe LCX86 contains four 2-input exclusive-OR gates. The
74LCX86
Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs
74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs March 1995 Revised January 2001 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs General Description Features The LCX86 contains four 2-input exclusive-OR gates. The5V tolerant inputs inputs tolerate voltages up to 7V allowing the interface of2.3V–3.6V V specifications provided CC 5V systems to 3V systems. 6.5 ns t max (V = 3.3V), 10 μA I max PD CC CC The 74LCX86 is fabricated with advanced CMOS technol- Power down high impedance inputs and outputs ogy to achieve high speed operation while maintaining CMOS low power dissipation.±24 mA output drive (V = 3.0V) CC Implements patented noise/EMI reduction circuitry Latch-up performance exceeds 500 mA ESD performance: Machine model > 2000V Human model > 200V Ordering Code: Order Number Package Number Package Description 74LCX86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX86SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A –A Inputs 0 3 B –B Inputs 0 3 O –O Outputs 0 3 © 2001 DS012415
