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74LCX760MTC-74LCX760MTCX-74LCX760SJX-74LCX760WM-74LCX760WMX Fast Delivery,Good Price
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74LCX760MTCFAIRCHILN/a11avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760MTCXFAIN/a4520avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760SJXFSCN/a2000avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760WMFAIRCHILDN/a26avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760WMXFAIRCHILN/a768avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760WMXFAIRCHILDN/a718avaiLow Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs


74LCX760MTCX ,Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain OutputsFeaturesThe LCX760 is the Open Drain version of the LCX244. The

74LCX760MTC-74LCX760MTCX-74LCX760SJX-74LCX760WM-74LCX760WMX
Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs
74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs July 2001 Revised February 2002 74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs General Description Features The LCX760 is the Open Drain version of the LCX244. TheOpen drain version of the LCX244 LCX760 contains eight non-inverting buffers with 3-STATE5V tolerant inputs and outputs outputs. The device may be employed as a memory 2.3V–3.6V V specifications provided CC address driver, clock driver and bus-oriented transmitter/ 8.0 ns t max (V = 3.3V), 10 μA I max receiver. The LCX760 is designed for low voltage (2.5V or PD CC CC 3.3V) V applications with capability of interfacing to a 5V CCPower down high impedance inputs and outputs signal environment. Supports live insertion/withdrawal (Note 1) The LCX760 is fabricated with an advanced CMOS tech-24 mA output drive (V = 3.0V) CC nology to achieve high speed operation while maintaining Implements patented noise/EMI reduction circuitry CMOS low power dissipation. Latch-up conforms to JEDEC JED78 ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX760WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide 74LCX760SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 4.4mm Wide 74LCX760MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX760MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC © 2002 DS500413
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