74LCX273 ,Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and OutputsFeaturesY5V tolerant inputs and outputsThe LCX273 has eight edge-triggered D-type flip-flops withYi ..
74LCX32 ,Low Voltage Quad 2-Input OR Gate with 5V Tolerant InputsFeaturesThe LCX32 contains four 2-input OR gates. The inputs tol-
74LCX273
Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs
TL/F/12640
74LCX273
Low-Voltage
Octal
Flip-Flop
with
Tolerant
Inputs
and
Outputs
ADVANCE INFORMATION
November 1996
74LCX273
Low-Voltage OctalD Flip-Flop
with 5V Tolerant Inputs and Outputs
General Description
The LCX273has eight edge-triggered D-type flip-flops with
individualD inputs andQ outputs. The common buffered
Clock (CP) and Master Reset (MR) input load and reset
(clear)all flip-flops simultaneously.
The registeris fully edge-triggered.The stateof eachDin-
put, one setup time beforethe LOW-to-HIGH clock tran-
sition,is transferredtothe corresponding flip-flop’sQout-
put.
All outputswillbe forced LOW independentlyof Clockor
Data inputsbya LOW voltage levelontheMR input.The
deviceis usefulforapplications wherethe trueoutput onlyis
requiredandthe Clockand Master Resetarecommontoall
storage elements.
The deviceis designedforlow voltage (3.3V) VCC applica-
tions with capabilityof interfacingtoa5V signal environ-
ment. The LCX273is fabricated withan advanced CMOS
technologyto achieve high speed operation while maintain-
ing CMOSlow power dissipation.
Features5V tolerant inputsand outputs10 mAICCQ max Power-down high impedance inputs and outputs Supportslive insertion/withdrawal 2.0V–3.6V VCC supply operation g24mA output drive Implements patented Quiet SeriesTM noise/EMI
reduction circuitry Functionally compatible withthe74 series273 Latch-up performance exceeds 500mA ESD performance:
Human Body Modell 2000V
Machine Modell 200V
Logic Symbols
TL/F/12640–1
IEEE/IEC
TL/F/12640–2
Connection Diagram
Pin Assignmentfor
SOIC, SSOPand TSSOP
TL/F/12640–3
Pin Names Description
D0–D7 Data Inputs Master Reset Clock Pulse Input
Q0–Q7 Data Outputs
SOIC JEDEC SOIC EIAJ SSOP TypeII TSSOP JEDEC
Order Number 74LCX273WM 74LCX273SJ 74LCX273MSA 74LCX273MTC
74LCX273WMX 74LCX273SJX 74LCX273MSAX 74LCX273MTCX
SeeNS Package Number M20B M20D MSA20 MTC20
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
QuietSeriesTMisa trademark ofNationalSemiconductor Corporation.
C1996National SemiconductorCorporation RRD-B30M17/Printed inU.S.A. http://
