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74LCX257MTC-74LCX257MTCX-74LCX257MX-74LCX257SJX
Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs
74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs May 1995 Revised September 2000 74LCX257 Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs General Description Features The LCX257 is a quad 2-input multiplexer with 3-STATE5V tolerant inputs and outputs outputs. Four bits of data from two sources can be selected2.3V–3.6V V specifications provided CC using a Common Data Select input. The four outputs 6.0 ns t max (V = 3.3V, I → Z ), 10 μA I max PD CC n n CC present the selected data in true (non inverted) form. The outputs may be switched to a high impedance state byPower down high impedance inputs and outputs placing a logic HIGH on the common Output Enable (OE)Supports live insertion/withdrawal (Note 1) input, allowing the outputs to interface directly with bus-ori- Implements patented noise/EMI reduction circuitry ented systems. Latch-up performance exceeds 500 mA The 74LCX257 is fabricated with advanced CMOS technol- ESD performance: ogy to achieve high speed operation while maintaining Human body model > 2000V CMOS low power dissipation. Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX257M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX257SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX257MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description S Common Data Select Input OE 3-STATE Output Enable Input I –I Data Inputs from Source 0 0a 0d I –I Data Inputs from Source 1 1a 1d Z –Z 3-STATE Multiplexer Outputs a d © 2000 DS012466
