74LCX257TTR ,LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
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74LCX27 ,Low Voltage Triple 3-Input NOR Gate with 5V Tolerant InputsFeaturesThe LCX27 contains three 3-input NOR gates. The inputs
74LCX257M-74LCX257TTR
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)
1/10June 2002 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED :
tPD = 6.0 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:CC (OPR) = 2.0V to 3.6V (1.5V Data
Retention) PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257 LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTIONThe 74LCX257 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C2 MOS technology. It is ideal for low
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
It is composed of four independent 2 channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The 74LCX257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B"
data is chosen.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX257LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74LCX2572/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
74LCX2573/10
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
74LCX2574/10
RECOMMENDED OPERATING CONDITIONS 1) Truth Table guaranteed: 1.5V to 3.6V
2) VIN from 0.8V to 2V at VCC = 3.0V
DC SPECIFICATIONS
74LCX2575/10
DYNAMIC SWITCHING CHARACTERISTICS 1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
AC ELECTRICAL CHARACTERISTICS 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per
channel)
74LCX2576/10
TEST CIRCUIT CL = 50 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
