74LCX16821MTD ,Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and Outputs74LCX16821 Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and OutputsJanuary 1996Revis ..
74LCX16821MTD ,Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and OutputsFunctional DescriptionThe LCX16821 contains twenty D-type flip-flops with 3- ments on the LOW-to-HI ..
74LCX16821MTD ,Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and OutputsFeaturesThe LCX16821 contains twenty non-inverting D-type flip- 5V tolerant inputs and outputsflop ..
74LCX16821MTDX ,Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and Outputsapplications. The device is designed for low voltage (2.5V 6.2 ns t max (V = 3.3V), 20 μA I maxPD C ..
74LCX16841MTD ,Low Voltage 20-Bit Transparent Latch with 5V Tolerant Inputs and OutputsElectrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-me ..
74LCX16841MTD ,Low Voltage 20-Bit Transparent Latch with 5V Tolerant Inputs and Outputsapplications with capability of interfacing to a 5V signalCCenvironment.
74LCX16821MEA-74LCX16821MEAX-74LCX16821MTD-74LCX16821MTDX
Low Voltage 20-Bit D-Type Flip-Flops with 5V Tolerant Inputs and Outputs
74LCX16821 Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs January 1996 Revised April 1999 74LCX16821 Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs General Description Features The LCX16821 contains twenty non-inverting D-type flip- � 5V tolerant inputs and outputs flops with 3-STATE outputs and is intended for bus oriented � 2.3V–3.6V V specifications provided CC applications. The device is designed for low voltage (2.5V � 6.2 ns t max (V = 3.3V), 20 μA I max PD CC CC or 3.3V) V applications with capability of interfacing to a CC � Power down high impedance inputs and outputs 5V signal environment. � Supports live insertion/withdrawal (Note 1) The LCX16821 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining � ±24 mA output drive (V = 3.0V) CC CMOS low power dissipation. � Implements patented noise/EMI reduction circuitry � Latch-up performance exceeds 500 mA � ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX16821MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74LCX16821MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) n CLK Clock Input n D –D Inputs 0 19 O –O Outputs 0 19 © 1999 DS012634.prf
