74LCX16646MTD ,Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and OutputsFeaturesThe LCX16646 contains sixteen non-inverting bidirectional
74LCX16646MEAX-74LCX16646MTD
Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs
74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs February 1994 Revised August 2002 74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs General Description Features The LCX16646 contains sixteen non-inverting bidirectional5V tolerant inputs and outputs registered bus transceivers with 3-STATE outputs, provid-2.3V–3.6V V specifications provided CC ing multiplexed transmission of data directly from the input 5.2 ns t max (V = 3.3V), 20 μA I max PD CC CC bus or from the internal storage registers. Each byte has separate control inputs which can be shorted together forPower down high impedance inputs and outputs full 16-bit operation.The DIR inputs determine the directionSupports live insertion/withdrawal (Note 1) of data flow through the device. The CPAB and CPBA ±24 mA Output Drive (V = 3.0V) CC inputs load data into the registers on the LOW-to-HIGH Implements patented noise/EMI reduction circuitry transition (see Functional Description). Latch-up performance exceeds 500 mA The LCX16646 is designed for low voltage (2.5V or 3.3V) V applications with capability of interfacing to a 5V signal CCESD performance: environment. Human Body Model > 2000V Machine Model > 200V The LCX16646 is fabricated with an advanced CMOS tech- Note 1: To ensure the high-impedance state during power up or down, OE nology to achieve high speed operation while maintaining should be tied to V through a pull-up resistor: the minimum value or the CC CMOS low power dissipation. resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX16646MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LCX16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description A Side A Inputs or 3-STATE Outputs n B Side B Inputs or 3-STATE Outputs n OE Output Enable Inputs n CPAB , CPBA Clock Pulse Inputs n n SAB , SBA Select Inputs n n DIR Direction Control Inputs n © 2002 DS012004
