74LCX16373MTD ,Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and OutputsFeaturesThe LCX16373 contains sixteen non-inverting latches with
74LCX16373G-74LCX16373GX-74LCX16373MEA-74LCX16373MEAX-74LCX16373MTD-74LCX16373MTDX
Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs February 1994 Revised June 2002 74LCX16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs General Description Features The LCX16373 contains sixteen non-inverting latches with5V tolerant inputs and outputs 3-STATE outputs and is intended for bus oriented applica-2.3V–3.6V V specifications provided CC tions. The device is byte controlled. The flip-flops appear 5.4 ns t max (V = 3.3V), 20 μA I max PD CC CC transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup timePower down high impedance inputs and outputs is latched. Data appears on the bus when the OutputSupports live insertion/withdrawal (Note 1) Enable (OE) is LOW. When OE is HIGH, the outputs are in ±24 mA output drive (V = 3.0V) CC a high impedance state. Uses patented noise/EMI reduction circuitry The LCX16373 is designed for low voltage (2.5V or 3.3V) Latch-up performance exceeds 500 mA V applications with capability of interfacing to a 5V signal CC environment.ESD performance: Human body model > 2000V The LCX16373 is fabricated with an advanced CMOS tech- nology to achieve high speed operation while maintaining Machine model > 200V CMOS low power dissipation. Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX16373G BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2)(Note 3) 74LCX16373MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide (Note 3) 74LCX16373MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2002 DS012002
