74LCX11MTCX ,Low Voltage Triple 3-Input AND Gate with 5V Tolerant InputsFeaturesThe LCX11 is a triple 3-input AND gate with buffered out-
74LCX11M-74LCX11MTC-74LCX11MTCX-74LCX11MX
Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs
74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs April 1995 Revised February 2005 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description Features The LCX11 is a triple 3-input AND gate with buffered out-5V tolerant inputs and outputs puts. LCX devices are designed for low voltage (2.5V or2.3V–3.6V V specifications provided CC 3.3V) operation with the added capability of interfacing to a 6.0ns t max (V 3.3V), 10 PA I max PD CC CC 5V signal environment. Power down high impedance inputs and outputs The 74LCX11 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintainingr24 mA output drive (V 3.0V) CC CMOS low power dissipation. Implements patented noise/EMI reduction circuitry Latch-up performance exceeds 500 mA ESD performance: Human body model ! 2000V Machine model ! 200V Ordering Code: Package Order Number Package Description Number 74LCX11M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX11MX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow (Note 1) 74LCX11SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX11MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX11MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide (Note 1) Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. © 2005 DS012426
