74LCX00 ,Low Voltage Quad 2-Input NAND Gate with 5V Tolerant InputsFeaturesThe LCX00 contains four 2-input NAND gates. The inputs
74LCX00
Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs March 1995 Revised January 2001 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features The LCX00 contains four 2-input NAND gates. The inputs5V tolerant inputs tolerate voltages up to 7V allowing the interface of 5V sys-2.3V–3.6V V specifications provided CC tems to 3V systems. 5.2 ns t max (V = 3.3V), 10 μA I max PD CC CC The 74LCX00 is fabricated with advanced CMOS technol- Power down high impedance inputs and outputs ogy to achieve high speed operation while maintaining CMOS low power dissipation.±24 mA output drive (V = 3.0V) CC Implements patented noise/EMI reduction circuitry Latch-up performance exceeds 500 mA ESD performance: Human body model > 2000V Machine model > 200V Ordering Code: Order Number Package Number Package Description 74LCX00M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX00SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX00MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A , B Inputs n n O Outputs n © 2001 DS012408
