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74HCT423DN/a2000avaiDual retriggerable monostable multivibrator with reset
74HCT423DNXPN/a30avaiDual retriggerable monostable multivibrator with reset
74HCT423NHARN/a225avaiDual retriggerable monostable multivibrator with reset


74HCT423D ,Dual retriggerable monostable multivibrator with resetFEATURES (C ). The external resistor and capacitor are normallyEXTconnected as shown in Fig.6.• DC ..
74HCT423D ,Dual retriggerable monostable multivibrator with resetGENERAL DESCRIPTIONFor pulse widths, when C < 10 000 pF, see Fig.9.EXTWhen C > 10 000 pF, the typic ..
74HCT423D ,Dual retriggerable monostable multivibrator with resetGeneral description74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible wi ..
74HCT423D ,Dual retriggerable monostable multivibrator with resetFeatures and benefits DC triggered from active HIGH or active LOW inputs Retriggerable for very l ..
74HCT423N ,Dual retriggerable monostable multivibrator with reset 74HC423; 74HCT423Dual retriggerable monostable multivibrator with resetRev. 6 — 19 December 2011 P ..
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74VHCU04 ,Hex InverterFeaturesYLow Power Dissipation:The74VHCU04isanadvancedhighspeedCMOSINVERT-e @ eI 2 mA (Max) T 25 CE ..
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74HCT423D-74HCT423N
Dual retriggerable monostable multivibrator with reset
1. General description
74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with
Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two
methods of output pulse width control. The minimum pulse width is essentially determined by the selection of an external
resistor (REXT) and capacitor (CEXT), see Section 12.1. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output
HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control
by reset.
The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input
rise and fall times.
The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they
cannot be triggered via the reset input.
2. Features and benefits
DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulse Schmitt-trigger action on all inputs except for the reset input Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Specified from 40 Cto+85 C and from 40 Cto+125C
74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
Rev. 6 — 19 December 2011 Product data sheet
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
3. Ordering information

4. Functional diagram

Table 1. Ordering information

74HC423N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT423N
74HC423D 40 C to +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT423D
74HC423BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
74HCT423BQ
74HCT423DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT423PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset

NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning

5.2 Pin description

Table 2. Pin description

1A, 2A 1, 9 trigger input (negative edge triggered)
1B, 2B 2, 10 trigger input (positive edge triggered)
1RD, 2RD 3, 11 direct reset (active LOW)
1Q, 2Q 4, 12 output (active LOW)
GND 8 ground (0V)
1Q, 2Q 13, 5 output (active HIGH)
1CEXT, 2CEXT 14, 6 external capacitor connection
1REXT/CEXT, 2REXT/CEXT 15, 7 external resistor/capacitor connection
VCC 16 supply voltage
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
6. Functional description

[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
 = LOW-to-HIGH transition;
 = HIGH-to-LOW transition;
[2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed.
7. Limiting values

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 C the value of Ptot derates linearly at 12 mW/K.
[3] For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K;
For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K;
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly at 4.5 mW/K.
Table 3. Function table[1]
XXL H XL[2] H[2]
XXL L[2] H[2]   H
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI >VCC +0.5 V [1]- 20 mA
IOK output clamping current VO< 0.5 V or VO >VCC +0.5V [1]- 20 mA output current 0.5 V < VO < VCC +0.5V - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation DIP16 package [2]- 750 mW
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
[3]- 500 mW
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 - +125 40 - +125 C
t/V input transition rise
and fall rate
VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0V).
74HC423

VIH HIGH-level
input voltage
VCC= 2.0V 1.5 1.2 - 1.5 - 1.5 - V
VCC= 4.5V 3.15 2.4 - 3.15 - 3.15 - V
VCC= 6.0V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage
VCC= 2.0V - 0.8 0.5 - 0.5 - 0.5 V
VCC= 4.5V - 2.1 1.35 - 1.35 - 1.35V
VCC= 6.0V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage =VIHorVIL= 20 A; VCC= 2.0V 1.9 2.0 - 1.9 - 1.9 - V= 20 A; VCC= 4.5V 4.4 4.5 - 4.4 - 4.4 - V= 20 A; VCC= 6.0V 5.9 6.0 - 5.9 - 5.9 - V= 4.0 mA; VCC= 4.5V 3.98 4.32 - 3.84 - 3.7 - V= 5.2 mA; VCC= 6.0V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage =VIHorVIL =20 A; VCC= 2.0V - 0 0.1 - 0.1 - 0.1 V =20 A; VCC= 4.5V - 0 0.1 - 0.1 - 0.1 V =20 A; VCC= 6.0V - 0 0.1 - 0.1 - 0.1 V =4.0 mA; VCC= 4.5V - 0.15 0.26 - 0.33 - 0.4 V =5.2 mA; VCC= 6.0V - 0.16 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND; VCC =6.0V - - 0.1 - 1.0 - 1.0 A
ICC supply current VI =VCCor GND; IO =0A;
VCC =6.0V - 8.0 - 80 - 160 A
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
input capacitance - 3.5 - - - - - pF
74HCT423

VIH HIGH-level input
voltage
VCC= 4.5 V to 5.5V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level input
voltage
VCC= 4.5 V to 5.5V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage =VIHor VIL; VCC =4.5V= 20A 4.4 4.5 - 4.4 - 4.4 - V= 4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level output
voltage =VIHor VIL; VCC =4.5V =20A - 0 0.1 -0.1 -0.1 V= 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND; VCC =5.5V - - 0.1 - 1.0 - 1.0 A
ICC supply current VI =VCCor GND; VCC =5.5V; =0A - 8.0 - 80 - 160 A
ICC additional supply
current
per input pin; VI =VCC 2.1V;
other inputs at VCCor GND;
VCC= 4.5Vto 5.5 V; IO =0A
nA, nB inputs - 35 126 - 158 - 172 A
nRD input - 50 180 - 225 - 245 A input capacitance - 3.5 - - - - - pF
Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND=0 V; test circuit see Figure 12.
74HC423

tpd propagation
delay
nA or nB to nQ or nQ; REXT =5k;
CEXT=0 pF; see Figure7
[1]
VCC = 2.0 V - 80 255 - 320 - 385 ns
VCC = 4.5 V - 29 51 - 64 - 77 ns
VCC = 5.0 V; CL =15pF - 25 - - - - - ns
VCC = 6.0 V - 23 43 - 54 - 65 ns
nRD to nQ or nQ; see Figure7 [1]
VCC = 2.0 V - 66 215 - 270 - 325 ns
VCC = 4.5 V - 24 43 - 54 - 65 ns
VCC = 5.0 V; CL =15pF - 20 - - - - - ns
VCC = 6.0 V - 19 37 - 46 - 55 ns transition time see Figure7 [2]
VCC = 2.0 V - 19 75 - 95 - 110 ns
VCC = 4.5 V - 7 15 - 19 - 22 ns
VCC = 6.0 V - 6 13 - 16 - 19 ns pulse width nA input LOW; see Figure7 and Figure8
VCC = 2.0 V 100 11 - 125 - 150 - ns
VCC = 4.5 V 20 4 - 25 - 30 - ns
VCC = 6.0 V 17 3 - 21 - 26 - ns
nB input HIGH; see Figure7 and Figure8
VCC = 2.0 V 100 17 - 125 - 150 - ns
VCC = 4.5 V 20 6 - 25 - 30 - ns
VCC = 6.0 V 17 5 - 21 - 26 - ns
nRD input LOW; see Figure7 and Figure8
VCC = 2.0 V 100 14 - 125 - 150 - ns
VCC = 4.5 V 20 5 - 25 - 30 - ns
VCC = 6.0 V 17 4 - 21 - 26 - ns
nQ HIGH or nQ LOW; VCC =5.0 V;
REXT =10k; CEXT= 100 nF;
see Figure7 and Figure8 450 - - - - - s
nQ HIGH or nQ LOW; VCC =5.0 V;
REXT =5k; CEXT =0pF; =GNDto VCC;
see Figure7 and Figure8
[3] - 75 - -- -- ns
trtrig retrigger time nA or nB input; VCC =5.0 V; REXT =5k;
CEXT=0 pF; see Figure10
[4] -110 - - - - - ns
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset

REXT external timing
resistor
VCC =2.0 V; see Figure8 10 - 1000 - - - - k
VCC =5.0V 2 - 1000 - - - - k
CEXT external timing
capacitor
VCC =5.0 V; see Figure8 [5] no limits pF
CPD power
dissipation
capacitance
per package; VI =GNDto VCC [6] - 54 - -- -- pF
74HCT423

tpd propagation
delay
nA or nB to nQ or nQ; REXT =5k;
CEXT=0 pF; see Figure7
VCC =4.5V [1] -30 51 - 64 - 77 ns
VCC =5.0 V; CL =15pF [1] - 26 - -- -- ns
nRD to nQ or nQ; REXT =5k;
CEXT=0 pF; see Figure7
[1] -26 48 - 60 - 72 ns
VCC =4.5V [1] -26 48 - 60 - 72 ns
VCC =5.0 V; CL =15pF [1] - 22 - -- -- ns transition time VCC = 4.5 V; Figure7 [2] - 7 15 - 19 - 22 ns pulse width trigger pulse; nA input LOW; VCC = 4.5V;
see Figure 7 and Figure10 5 - 25 - 30 - ns
trigger pulse; nB input HIGH; VCC = 4.5V;
see Figure 7 and Figure10 5 - 25 - 30 - ns
reset pulse; nRD input LOW; VCC = 4.5V;
see Figure 7 and Figure11 7 - 25 - 30 - ns
output pulse; nQ HIGH or nQ LOW;
VCC =5.0 V; REXT =10k; CEXT =100 nF;
see Figure 7, Figure 10 and Figure11 450 - - - - - s
output pulse; nQ HIGH or nQ LOW;
VCC= 5.0 V; REXT =5k; CEXT =0pF; = GND to VCC 1.5 V; see Figure7,
Figure 10 and Figure11
[3] - 75 - -- -- ns
trtrig retrigger time nA or nB input; VCC =5.0 V; REXT =5k;
CEXT=0 pF; see Figure10
-110 - - - - - ns
REXT external timing
resistor
VCC =5.0 V; see Figure8 2 - 1000 - - - - k
CEXT external timing
capacitor
VCC =5.0 V; see Figure8 [5] no limits pF
Table 7. Dynamic characteristics …continued

GND=0 V; test circuit see Figure 12.
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset

[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] For other REXT and CEXT combinations see Figure 8. If CEXT > 10 pF, the next formula is valid:
tW = K  REXT  CEXT (typ.), where:
tW = output pulse width in ns;
REXT = external resistor in k;
CEXT = external capacitor in pF;
K = 0.55 for VCC = 2.0 V and 0.45 for VCC = 5.0 V; see Figure9.
Inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[4] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be
extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time.
If CEXT > 10 pF, the next formula (at VCC = 5.0 V) for the set-up time of a retrigger pulse is valid:
trtrig = 30 + 0.19  REXT  CEXT 0.9 + 13  REXT 1.05 (typ.); where:
trtrig = retrigger time in ns;
CEXT = external capacitor in pF;
REXT = external resistor in k.
Inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[5] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF.
[6] CPD is used to determine the dynamic power dissipation (PD in W): =CPD VCC2fi N+ (CL VCC2 fo); where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
CPD power
dissipation
capacitance
per package; VI =GNDto VCC 1.5V [6] - 56 - -- -- pF
Table 7. Dynamic characteristics …continued

GND=0 V; test circuit see Figure 12.
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset
11. Waveforms

Table 8. Measurement points

74HC423 VCC 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT423 3V 1.3V 1.3V 0.1VCC 0.9VCC
NXP Semiconductors 74HC423; 74HCT423
Dual retriggerable monostable multivibrator with reset

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