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74HC7731D
Quad 64-bit static shift register
Philips Semiconductors Product specification
Quad 64-bit static shift register 74HC/HCT7731
FEATURES Frequency range DC to 100 MHz. Separate serial data inputs Cascadable Functionally compatible with
HEF 4731 Includes recycling mode Direct shift out Output capability: Standard ICC category: LSI.
APPLICATIONS Data storage Delay line.
GENERAL DESCRIPTIONThe HC/HCT7731 are high-speed
Si-gate CMOS devices. They are
specified in compliance with JEDEC
standard no. 7A.
The HC/HCT7731 are quad 64-bit
static shift registers with a recycling
mode. Each register has separate
data inputs Da to Dd, clock inputs CPa
to CPd and data outputs Qa to Qd.
Data shifts one place towards the
output, each LOW to HIGH transition
of the clock pulse. Each recycling
mode input controls two registers
RECab for registers A and B and
RECcd for registers C and D. When
the REC input is HIGH, the device is
in the recycling mode and data at the
output is shifted back into the input of
the register, so after 64 clock pulses
the contents of a register is again in
its original position. This enables the
user to tap off data from any position.
When the REC input is LOW external
data can be shifted in.
QUICK REFERENCE DATAGND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
Notes CPD is used to determine the dynamic power dissipation (PD in μW):
PD = (CPD x VCC 2 x fi) + (CL + VCC 2 x fo) + (Ipull-up x VCC)
where:
fi = input frequency in MHz.
fo = output frequency in MHz.
VCC = supply voltage in V.
CL = output load capacitance in pF.
Ipull-up = pull-up currents in μA. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V. See also power dissipation information.
ORDERING INFORMATION
Philips Semiconductors Product specification
Quad 64-bit static shift register 74HC/HCT7731
PINNING
Philips Semiconductors Product specification
Quad 64-bit static shift register 74HC/HCT7731
FUNCTION TABLE
Notes L = LOW voltage level
H = HIGH voltage Level
↑ = LOW-to-HIGH CP transition
Philips Semiconductors Product specification
Quad 64-bit static shift register 74HC/HCT7731
DC CHARACTERISTICS FOR 74HCFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: LSI.
AC CHARACTERISTICS FOR 74HCGND = 0 V; tr = tf = 6 ns; CL = 50 pF.
Note The maximum power dissipation has to be observed. See power dissipation information.
Philips Semiconductors Product specification
Quad 64-bit static shift register 74HC/HCT7731
UNIT LOAD COEFFICIENT
Notes The RS input has CMOS input switching levels. The value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications. To
determine ΔICC per input, multiply this value by the unit load coefficient shown in Table 1.
AC CHARACTERISTICS FOR 74HCTGND = 0 V; tr = tf = 6 ns; CL = 50 pF.
