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74HC4051D+ |74HC4051DNXPN/a23avai74HC/HCT4051; 8-channel analog multiplexer/demultiplexer
74HC4051DBNXPN/a165avai8-channel analog multiplexer/demultiplexer
74HCT4051DBNXPN/a262avai74HC/HCT4051; 8-channel analog multiplexer/demultiplexer
74HCT4051PW NXP N/a22210avai8-channel analog multiplexer/demultiplexer


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74HC4051D+-74HC4051DB-74HCT4051DB-74HCT4051PW
8-channel analog multiplexer/demultiplexer
1. General description
The 74HC4051; 74HCT4051 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC
standard no. 7A.
The 74HC4051; 74HCT4051 is an 8-channel analog multiplexer/demultiplexer with three
digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent
inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight
switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are
in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4051 and 4.5 V to 5.5 V for
74HCT4051. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a
positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).
2. Features and benefits
Wide analog input voltage range from 5 V to +5V Low ON resistance:80 (typical) at VCC VEE =4.5V70 (typical) at VCC VEE =6.0V60 (typical) at VCC VEE =9.0V Logic level translation: to enable 5 V logic to communicate with 5 V analog signals Typical ‘break before make’ built-in ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101E exceeds 1000V Multiple package options Specified from 40 Cto +85 C and 40 Cto +125C
3. Applications
Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating
74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
Rev. 7 — 19 July 2012 Product data sheet
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
4. Ordering information

5. Functional diagram

Table 1. Ordering information

74HC4051N 40 Cto +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT4051N
74HC4051D 40 Cto +125 C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT4051D
74HC4051DB 40 Cto +125 C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT4051DB
74HC4051PW 40 Cto +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HCT4051PW
74HC4051BQ 40 Cto +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5 3.5 0.85 mm
SOT763-1
74HCT4051BQ
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning

6.2 Pin description

Table 2. Pin description
6 enable input (active LOW)
VEE 7 supply voltage
GND 8 ground supply voltage
S0, S1, S2 11, 10, 9 select input
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output 3 common output or input
VCC 16 supply voltage
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table

[1] H= HIGH voltage level;= LOW voltage level;= don’t care.
8. Limiting values

[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.
[2] For DIP16 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.
[3] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
Table 3. Function table[1]

LLLLY0toZ
LLLH Y1toZ L H L Y2toZ L H H Y3toZ LLY4toZ LH Y5toZ HHL Y6toZ HHHY7toZ XXXswitches off
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
VCC supply voltage [1] 0.5 +11.0 V
IIK input clamping current VI< 0.5 V or VI >VCC +0.5V - 20 mA
ISK switch clamping current VSW< 0.5 V or VSW >VCC +0.5V - 20 mA
ISW switch current 0.5V< VSW IEE supply current - 20 mA
ICC supply current - 50 mA
IGND ground current - 50 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation DIP16 package [2]- 750 mW
SO16, (T)SSOP16, and
DHVQFN16 package
[3]- 500 mW power dissipation per switch - 100 mW
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
9. Recommended operating conditions

Table 5. Recommended operating conditions

VCC supply voltage see Figure7
and Figure8
VCC GND 2.0 5.0 10.0 4.5 5.0 5.5 V
VCC VEE 2.0 5.0 10.0 2.0 5.0 10.0 V input voltage GND - VCC GND - VCC V
VSW switch voltage VEE -VCC VEE -VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise and fall
rate
VCC= 2.0V - - 625 - - - ns/V
VCC= 4.5V - 1.67 139 - 1.67 139 ns/V
VCC =6.0V - - 83 - - - ns/V
VCC= 10.0V - - 31 - - - ns/V
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
10. Static characteristics
Table 6. RON resistance per switch for 74HC4051 and 74HCT4051
VI = VIH or VIL; for test circuit see Figure9.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
For 74HC4051: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0V.
For 74HCT4051: VCC GND= 4.5 V and 5.5 V, VCC VEE= 2.0 V, 4.5 V, 6.0 V and 9.0V.
Tamb =25
C
RON(peak) ON resistance (peak) Vis =VCCto VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A- 100 180 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A- 90 160 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A- 70 130 
RON(rail) ON resistance (rail) Vis =VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] -150 - 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A- 80 140 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A- 70 120 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A- 60 105 
Vis =VCC
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] -150 - 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A- 90 160 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A- 80 140 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A- 65 120 
RON ON resistance mismatch
between channels
Vis =VCC to VEE
VCC = 2.0 V; VEE = 0 V [1] --- 
VCC = 4.5 V; VEE = 0 V - 9 - 
VCC = 6.0 V; VEE = 0 V - 8 - 
VCC = 4.5 V; VEE = 4.5 V - 6 - 
Tamb=
40 Cto+85C
RON(peak) ON resistance (peak) Vis =VCCto VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --225 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --200 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --165 
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

[1] When supply voltages (VCC VEE) near 2.0 V the analog switch ON resistance becomes extremely non-linear. When using a supply of V, it is recommended to use these devices only for transmitting digital signals.
RON(rail) ON resistance (rail) Vis =VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --175 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --150 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --130 
Vis =VCC
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --200 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --175 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --150 
Tamb=
40Cto +125C
RON(peak) ON resistance (peak) Vis =VCCto VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --270 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --240 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --195 
RON(rail) ON resistance (rail) Vis =VEE
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --210 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --180 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --160 
Vis =VCC
VCC = 2.0 V; VEE = 0 V; ISW= 100 A [1] --- 
VCC = 4.5 V; VEE = 0 V; ISW= 1000 A --240 
VCC = 6.0 V; VEE = 0 V; ISW= 1000 A --210 
VCC = 4.5 V; VEE = 4.5 V; ISW = 1000 A --180 
Table 6. RON resistance per switch for 74HC4051 and 74HCT4051 …continued

VI = VIH or VIL; for test circuit see Figure9.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
For 74HC4051: VCC GND or VCC VEE = 2.0 V, 4.5 V, 6.0 V and 9.0V.
For 74HCT4051: VCC GND= 4.5 V and 5.5 V, VCC VEE= 2.0 V, 4.5 V, 6.0 V and 9.0V.
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

Table 7. Static characteristics for 74HC4051

Voltages are referenced to GND (ground=0V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Tamb =25
C
VIH HIGH-level input
voltage
VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VCC = 9.0 V 6.3 4.7 - V
VIL LOW-level input
voltage
VCC = 2.0 V - 0.8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VCC = 9.0 V - 4.3 2.7 V input leakage current VEE = 0 V; VI =VCCor GND
VCC = 6.0 V - - 0.1 A
VCC = 10.0 V - - 0.2 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 0.1 A
all channels - - 0.4 A
IS(ON) ON-state leakage
current =VIHor VIL; VSW =VCC VEE;
VCC= 10.0 V; VEE = 0 V; see Figure12 0.4 A
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

ICC supply current VEE = 0 V; VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 6.0 V - - 8.0 A
VCC = 10.0 V - - 16.0 A input capacitance - 3.5 - pF
Csw switch capacitance independent pins Yn - 5 - pF
common pins Z - 25 - pF
Tamb=
40 Cto+85C
VIH HIGH-level input
voltage
VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-level input
voltage
VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V input leakage current VEE = 0 V; VI =VCCor GND
VCC = 6.0 V - - 1.0 A
VCC = 10.0 V - - 2.0 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 1.0 A
all channels - - 4.0 A
IS(ON) ON-state leakage
current =VIHor VIL; VSW =VCC VEE;
VCC= 10.0 V; VEE = 0 V; see Figure12 4.0 A
ICC supply current VEE = 0 V; VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 6.0 V - - 80.0 A
VCC = 10.0 V - - 160.0 A
Tamb=
40Cto +125C
VIH HIGH-level input
voltage
VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.2 - - V
VCC = 9.0 V 6.3 - - V
VIL LOW-level input
voltage
VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VCC = 9.0 V - - 2.7 V
Table 7. Static characteristics for 74HC4051 …continued

Voltages are referenced to GND (ground=0V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
input leakage current VEE = 0 V; VI =VCCor GND
VCC = 6.0 V - - 1.0 A
VCC = 10.0 V - - 2.0 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 1.0 A
all channels - - 4.0 A
IS(ON) ON-state leakage
current =VIHor VIL; VSW =VCC VEE;
VCC= 10.0 V; VEE = 0 V; see Figure12 4.0 A
ICC supply current VEE = 0 V; VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 6.0 V - - 160.0 A
VCC = 10.0 V - - 320.0 A
Table 7. Static characteristics for 74HC4051 …continued

Voltages are referenced to GND (ground=0V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Table 8. Static characteristics for 74HCT4051

Voltages are referenced to GND (ground=0V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
Tamb =25
C
VIH HIGH-level input
voltage
VCC = 4.5 V to 5.5 V 2.0 1.6 - V
VIL LOW-level input
voltage
VCC = 4.5 V to 5.5 V - 1.2 0.8 V input leakage current VI =VCCor GND; VCC = 5.5 V; VEE = 0 V - - 0.1 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 0.1 A
all channels - - 0.4 A
IS(ON) ON-state leakage
current
VCC= 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure12 0.4 A
ICC supply current VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 5.5 V; VEE = 0 V - - 8.0 A
VCC = 5.0 V; VEE = 5.0 V - - 16.0 A
ICC additional supply
current
per input; VI =VCC 2.1 V; other inputs at VCC
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V 50 180 A input capacitance - 3.5 - pF
Csw switch capacitance independent pins Yn - 5 - pF
common pins Z - 25 - pF
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
Tamb=
40 Cto+85C
VIH HIGH-level input
voltage
VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input
voltage
VCC = 4.5 V to 5.5 V - - 0.8 V input leakage current VI =VCCor GND; VCC = 5.5 V; VEE = 0 V - - 1.0 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 1.0 A
all channels - - 4.0 A
IS(ON) ON-state leakage
current
VCC= 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure12 4.0 A
ICC supply current VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 5.5 V; VEE = 0 V - - 80.0 A
VCC = 5.0 V; VEE = 5.0 V - - 160.0 A
ICC additional supply
current
per input; VI =VCC 2.1 V; other inputs at VCC
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V - 225 A
Tamb=
40Cto +125C
VIH HIGH-level input
voltage
VCC = 4.5 V to 5.5 V 2.0 - - V
VIL LOW-level input
voltage
VCC = 4.5 V to 5.5 V - - 0.8 V input leakage current VI =VCCor GND; VCC = 5.5 V; VEE = 0 V - - 1.0 A
IS(OFF) OFF-state leakage
current
VCC = 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure11
per channel - - 1.0 A
all channels - - 4.0 A
IS(ON) ON-state leakage
current
VCC= 10.0 V; VEE = 0 V; VI =VIHor VIL; VSW =VCC VEE; see Figure12 4.0 A
ICC supply current VI =VCCor GND; Vis =VEEor VCC;
Vos =VCCor VEE
VCC = 5.5 V; VEE = 0 V - - 160.0 A
VCC = 5.0 V; VEE = 5.0 V - - 320.0 A
ICC additional supply
current
per input; VI =VCC 2.1 V; other inputs at VCC
or GND; VCC = 4.5 V to 5.5 V; VEE = 0 V - 245 A
Table 8. Static characteristics for 74HCT4051 …continued

Voltages are referenced to GND (ground=0V).
Vis is the input voltage at pins Yn or Z, whichever is assigned as an input.
Vos is the output voltage at pins Z or Yn, whichever is assigned as an output.
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

11. Dynamic characteristics

Table 9. Dynamic characteristics for 74HC4051

GND=0 V; tr=tf =6ns; CL=50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Tamb =25
C
tpd propagation delay Vis to Vos; RL=  ; see Figure13 [1]
VCC = 2.0 V; VEE= 0 V - 14 60 ns
VCC = 4.5 V; VEE =0 V - 5 12 ns
VCC = 6.0 V; VEE =0 V - 4 10 ns
VCC = 4.5 V; VEE= 4.5 V - 4 8 ns
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

ton turn-on time E to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE= 0 V - 72 345 ns
VCC = 4.5 V; VEE= 0 V - 29 69 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 22 - ns
VCC = 6.0 V; VEE= 0 V - 21 59 ns
VCC = 4.5 V; VEE= 4.5 V - 18 51 ns
Sn to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE= 0 V - 66 345 ns
VCC = 4.5 V; VEE= 0 V - 28 69 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 20 - ns
VCC = 6.0 V; VEE= 0 V - 19 59 ns
VCC = 4.5 V; VEE= 4.5 V - 16 51 ns
toff turn-off time E to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE= 0 V - 58 290 ns
VCC = 4.5 V; VEE= 0 V - 31 58 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 18 - ns
VCC = 6.0 V; VEE= 0 V - 17 49 ns
VCC = 4.5 V; VEE= 4.5 V - 18 42 ns
Sn to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE= 0 V - 61 290 ns
VCC = 4.5 V; VEE= 0 V - 25 58 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 19 - ns
VCC = 6.0 V; VEE= 0 V - 18 49 ns
VCC = 4.5 V; VEE= 4.5 V - 18 42 ns
CPD power dissipation
capacitance
per switch; VI = GND to VCC [4] -25 - pF
Tamb=
40 Cto+85C
tpd propagation delay Vis to Vos; RL=  ; see Figure13 [1]
VCC = 2.0 V; VEE =0 V - - 75 ns
VCC = 4.5 V; VEE =0 V - - 15 ns
VCC = 6.0 V; VEE =0 V - - 13 ns
VCC = 4.5 V; VEE= 4.5 V - - 10 ns
Table 9. Dynamic characteristics for 74HC4051 …continued

GND=0 V; tr=tf =6ns; CL=50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

ton turn-on time E to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE =0 V - - 430 ns
VCC = 4.5 V; VEE =0 V - - 86 ns
VCC = 6.0 V; VEE =0 V - - 73 ns
VCC = 4.5 V; VEE= 4.5 V - - 64 ns
Sn to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE =0 V - - 430 ns
VCC = 4.5 V; VEE =0 V - - 86 ns
VCC = 6.0 V; VEE =0 V - - 73 ns
VCC = 4.5 V; VEE= 4.5 V - - 64 ns
toff turn-off time E to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE =0 V - - 365 ns
VCC = 4.5 V; VEE =0 V - - 73 ns
VCC = 6.0 V; VEE =0 V - - 62 ns
VCC = 4.5 V; VEE= 4.5 V - - 53 ns
Sn to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE =0 V - - 365 ns
VCC = 4.5 V; VEE =0 V - - 73 ns
VCC = 6.0 V; VEE =0 V - - 62 ns
VCC = 4.5 V; VEE= 4.5 V - - 53 ns
Tamb=
40Cto +125C
tpd propagation delay Vis to Vos; RL=  ; see Figure13 [1]
VCC = 2.0 V; VEE =0 V - - 90 ns
VCC = 4.5 V; VEE =0 V - - 18 ns
VCC = 6.0 V; VEE =0 V - - 15 ns
VCC = 4.5 V; VEE= 4.5 V - - 12 ns
ton turn-on time E to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE =0 V - - 520 ns
VCC = 4.5 V; VEE =0 V - - 104 ns
VCC = 6.0 V; VEE =0 V - - 88 ns
VCC = 4.5 V; VEE= 4.5 V - - 77 ns
Sn to Vos; RL= ; see Figure14 [2]
VCC = 2.0 V; VEE =0 V - - 520 ns
VCC = 4.5 V; VEE =0 V - - 104 ns
VCC = 6.0 V; VEE =0 V - - 88 ns
VCC = 4.5 V; VEE= 4.5 V - - 77 ns
Table 9. Dynamic characteristics for 74HC4051 …continued

GND=0 V; tr=tf =6ns; CL=50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
NXP Semiconductors 74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer

[1] tpd is the same as tPHL and tPLH.
[2] ton is the same as tPZH and tPZL.
[3] toff is the same as tPHZ and tPLZ.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD  VCC2fi N + {(CL +Csw)  VCC2  fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
N = number of inputs switching;
{(CL +Csw)  VCC2  fo} = sum of outputs;
CL = output load capacitance in pF;
Csw = switch capacitance in pF;
VCC = supply voltage in V.
toff turn-off time E to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE =0 V - - 435 ns
VCC = 4.5 V; VEE =0 V - - 87 ns
VCC = 6.0 V; VEE =0 V - - 74 ns
VCC = 4.5 V; VEE= 4.5 V - - 72 ns
Sn to Vos; RL =1 k; see Figure14 [3]
VCC = 2.0 V; VEE =0 V - - 435 ns
VCC = 4.5 V; VEE =0 V - - 87 ns
VCC = 6.0 V; VEE =0 V - - 74 ns
VCC = 4.5 V; VEE= 4.5 V - - 72 ns
Table 9. Dynamic characteristics for 74HC4051 …continued

GND=0 V; tr=tf =6ns; CL=50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Table 10. Dynamic characteristics for 74HCT4051

GND=0 V; tr=tf =6ns; CL=50 pF; for test circuit see Figure 15.
Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input.
Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output.
Tamb =25
C
tpd propagation delay Vis to Vos; RL= ; see Figure13 [1]
VCC = 4.5 V; VEE =0 V - 5 12 ns
VCC = 4.5 V; VEE= 4.5 V - 4 8 ns
ton turn-on time E to Vos; RL =1 k; see Figure14 [2]
VCC = 4.5 V; VEE= 0 V - 26 55 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 22 - ns
VCC = 4.5 V; VEE= 4.5 V - 16 39 ns
Sn to Vos; RL =1 k; see Figure14 [2]
VCC = 4.5 V; VEE= 0 V - 28 55 ns
VCC = 5.0 V; VEE =0 V; CL = 15 pF - 24 - ns
VCC = 4.5 V; VEE= 4.5 V - 16 39 ns
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