74HCT4040N ,12-stage binary ripple counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT4040N ,12-stage binary ripple counterPin configuration DIP16, SO16, SSOP16 and Fig 6.
74HCT4040PW ,74HC/HCT4040; 12-stage binary ripple counterGENERAL DESCRIPTIONThe 74HC/HCT4040 are high-speed Si-gate CMOS
74HCT4046AD ,Phase-locked-loop with VCOINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT4046ADB ,74HC/HCT4046A; Phase-locked-loop with VCOFEATURES provided at pin 10 (DEM ). In contrast to conventionalOUTtechniques where the DEM voltage ..
74HCT4046AN ,Phase-locked-loop with VCOINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74VHCT245AMTCX ,Octal Buffer/Line Driver with 3-STATE OutputsGeneral Descriptiondue to mismatched supply and input/output voltages. ThisThe VHCT245A is an advan ..
74VHCT245AMX ,Octal Buffer/Line Driver with 3-STATE OutputsGeneral Descriptiondue to mismatched supply and input/output voltages. ThisThe VHCT245A is an advan ..
74VHCT245AN ,Octal Buffer/Line Driver with 3-STATE OutputsGeneral Descriptiondue to mismatched supply and input/output voltages. ThisThe VHCT245A is an advan ..
74VHCT245ASJ ,Octal Buffer/Line Driver with 3-STATE Outputs74VHCT245A Octal Buffer/Line Driver with 3-STATE OutputsMarch 1997Revised March 199974VHCT245AOctal ..
74VHCT245ASJ ,Octal Buffer/Line Driver with 3-STATE OutputsElectrical CharacteristicsT = 25°CT = - 40°C to +85°CV A A CCSymbol Parameter Units Conditions(V)Mi ..
74VHCT245ASJX ,Octal Buffer/Line Driver with 3-STATE OutputsElectrical CharacteristicsT = 25°CT = - 40°C to +85°CV A A CCSymbol Parameter Units Conditions(V)Mi ..
74HC4040D-74HCT4040N
12-stage binary ripple counter
1. General descriptionThe 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP),
an overriding asynchronous master reset input (MR) and twelve parallel outputs (Q0 to
Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears
all counter stages and forces all outputs LOW, independent of the state of CP. Each
counter stage is a static toggle flip-flop. Inputs include clamp diodes that enable the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits Complies with JEDEC standard no. 7A Input levels: For 74HC4040: CMOS level For 74HCT4040: TTL level ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125C
3. Applications Frequency dividing circuits Time delay circuits Control counters
4. Ordering information
74HC4040; 74HCT4040
12-stage binary ripple counter
Rev. 4 — 20 March 2014 Product data sheet
Table 1. Ordering information
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
5. Functional diagram
Table 1. Ordering information …continued
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
6. Pinning information
6.1 PinningNXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
6.2 Pin description
7. Functional description
7.1 Function table[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; = LOW-to-HIGH clock transition; = HIGH-to-LOW clock transition.
Table 2. Pin description
Table 3. Function table
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
7.2 Timing diagram
8. Limiting values[1] For DIP16 packages: above 70 C, Ptot derates linearly with 12 mW/K.
For SO16, SSOP16, TSSOP16 and DHVQFN16 packages, above 70 C, Ptot derates linearly with 8 mW/K.
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
9. Recommended operating conditions
10. Static characteristics
Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0V)
Table 6. Static characteristicsAt recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
Table 6. Static characteristics …continuedAt recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
11. Dynamic characteristicsTable 7. Dynamic characteristicsGND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure9.
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter[1] tpd is the same as tPHL, tPLH.
[2] tt is the same as tTHL, tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2 fo) = sum of outputs.
Table 7. Dynamic characteristics …continuedGND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure9.
NXP Semiconductors 74HC4040; 74HCT4040
12-stage binary ripple counter
12. Waveform and test circuit
