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74HC393DNXP/PHIN/a809avaiDual 4-bit binary ripple counter
74HC393NNSN/a1avaiDual 4-bit binary ripple counter
74HCT393DPHN/a430avai74HC/HCT393; Dual 4-bit binary ripple counter


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74HC393D-74HC393N-74HCT393D
Dual 4-bit binary ripple counter
1. General description
The 74HC393; 7474HCT393 is a dual 4-stage binary ripple counter. Each counter
features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4
buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW
transition of nCP. A HIGH on nMR clears the counter stages and forces the outputs LOW,
independent of the state of nCP. Inputs include clamp diodes. This enables the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels: For 74HC393: CMOS level For 74HCT393: TTL level Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V. Two 4-bit binary counters with individual clocks Divide by any binary module up to 28 in one package Two master resets to clear each 4-bit counter individually
3. Ordering information

74HC393; 74HCT393
Dual 4-bit binary ripple counter
Rev. 5 — 1 April 2014 Product data sheet
Table 1. Ordering information
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
4. Functional diagram

NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter

5. Pinning information
5.1 Pinning

NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter

5.2 Pin description

Table 2. Pin description
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
6. Functional description

[1] H= HIGH voltage level; L= LOW voltage level.
7. Limiting values

[1] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60C.
Table 3. Count sequence for one counter[1]
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
8. Recommended operating conditions

9. Static characteristics

Table 5. Recommended operating conditions

Voltages are referenced to GND (ground = 0V)
Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground =0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure11.
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
Table 7. Dynamic characteristics …continued

Voltages are referenced to GND (ground =0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure11.
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter

[1] tpd is the same as tPLH and tPHL.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC = supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
10.1 Waveforms

Table 7. Dynamic characteristics …continued

Voltages are referenced to GND (ground =0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure11.
Table 8. Measurement points
NXP Semiconductors 74HC393; 74HCT393
Dual 4-bit binary ripple counter
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