74HC366D-74HCT366D Fast Delivery |IC PHOENIX CO.,LIMITED

74HC366D ,Hex buffer/line driver; 3-state; invertingGeneral descriptionThe 74HC366; 74HCT366 is a hex inverter/line driver with 3-state outputs control ..
74HC367D ,74HC/HCT367; Hex buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC367N ,74HC/HCT367; Hex buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC367N ,74HC/HCT367; Hex buffer/line driver; 3-stateGENERAL DESCRIPTIONoutputs.The 74HC/HCT367 are high-speed Si-gate CMOS devicesand are pin compatibl ..
74HC367PW ,74HC/HCT367; Hex buffer/line driver; 3-stateFEATURES The 74HC/HCT367 are hex non-inverting buffer/linedrivers with 3-state outputs. The 3-state ..
74HC368D ,74HC/HCT368; Hex buffer/line driver; 3-state; invertingINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74LVCH162373ADL ,16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output tolerant; 3-stateapplications.exceeds 2000 V One latch enable (LE) input and one output enable (OE) are provide for ..
74LVCH162374A ,3-state
74LVCH162374ADGG ,16-bit edge-triggered D-type flip-flop with 30 惟 series termination resistors; 5 V input/output tolerant; 3-state
74LVCH16244A ,5 V input/output tolerant (3-State)
74LVCH16244ADGG ,16-bit buffer/line driver; 5 V input/output tolerant; 3-statePIN CONFIGURATION• 5 volt tolerant inputs/outputs for interfacing with 5V logic1OE 1 48 2OE• Wide s ..
74LVCH16244ADGVRE4 , 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

74HC366D-74HCT366D
Hex buffer/line driver; 3-state; inverting
1. General description
The 74HC366; 74HCT366 is a hex inverter/line driver with 3-state outputs controlled by
the output enable inputs (OE1). A HIGH on OEn causes the outputs to assume a high
impedance OFF-state. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
The 74HC366; 74HCT366 is functionally identical to: 74HC365; 74HCT365, but has inverted outputs
2. Features and benefits Inverting outputs Input levels: For 74HC366: CMOS level For 74HC366: TTL level Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-F exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V Specified from 40 Cto+85 C and from 40 Cto+125C Multiple package options
74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
Rev. 4 — 4 September 2012 Product data sheet
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
3. Ordering information
4. Functional diagram
Table 1. Ordering information
74HC366
74HC366D 40Cto +125C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HC366N 40Cto +125C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
74HC366PW 40Cto +125C TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
SOT403-1
74HCT366
74HCT366D 40Cto +125C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT366DB 40Cto +125C SSOP16 plastic shrink small outline package; 16 leads; body width
5.3 mm
SOT338-1
74HCT366N 40Cto +125C DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
74HCT366PW 40Cto +125C TSSOP16 plastic thin shrink small outline package; 16 leads; body
width 4.4 mm
SOT403-1
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
5. Pinning information
5.1 Pinning
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
5.2 Pin description
6. Functional description
[1] H= HIGH voltage level;= LOW voltage level;= don’t care;= high-impedance OFF-state.
Table 2. Pin description
OE1 1 output enable input 1 (active LOW) 2 data input 1 3 data output 1 4 data input 2 5 data output 2 6 data input 3 7 data output 3
GND 8 ground (0 V) 9 data output 4 10 data input 4 11 data output 5 12 data input 5 13 data output 6 14 data input 6
OE2 15 output enable input 2 (active LOW)
VCC 16 supply voltage
Table 3. Function table[1] LH H L XZ X Z
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
7. Limiting values
[1] For DIP16 packages: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C.
[3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI >VCC+ 0.5 V - 20 mA
IOK output clamping current VO< 0.5 V or VO >VCC +0.5V - 20 mA output current VO = 0.5 V to (VCC +0.5V) - 35 mA
ICC supply current - 70 mA
IGND ground current - 70 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation DIP16 package [1] -750 mW
SO16 package [2] -500 mW
SSOP16 package [3] -500 mW
TSSOP16 package [3] -500 mW
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0V)
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
9. Static characteristicsTable 6. Static characteristics 74HC366
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb =25C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V
VCC = 4.5 V 3.15 2.4 - V
VCC = 6.0 V 4.2 3.2 - V
VIL LOW-level input voltage VCC = 2.0 V - 0.8 0.5 V
VCC = 4.5 V - 2.1 1.35 V
VCC = 6.0 V - 2.8 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL ---= 20 A; VCC = 2.0 V 1.9 2.0 - V= 20 A; VCC = 4.5 V 4.4 4.5 - V= 20 A; VCC = 6.0 V 5.9 6.0 - V
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32- V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81- V
VOL LOW-level output voltage VI = VIH or VIL =20 A; VCC = 2.0 V - 0 0.1 V =20 A; VCC = 4.5 V - 0 0.1 V =20 A; VCC = 6.0 V - 0 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 V input leakage current VI =VCCor GND; VCC = 6.0 V - - 0.1 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND; VCC = 6.0 V - - 0.5 A
ICC supply current VI =VCCor GND; IO = 0 A; VCC= 6.0V --8.0 A input capacitance - 3.5 - pF
Tamb= 40 Cto+85C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15- - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL= 20 A; VCC = 2.0 V 1.9 - - V= 20 A; VCC = 4.5 V 4.4 - - V= 20 A; VCC = 6.0 V 5.9 - - V
IO = 6.0 mA; VCC = 4.5 V 3.84- - V
IO = 7.8 mA; VCC = 6.0 V 5.34- - V
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
VOL LOW-level output voltage VI = VIH or VIL =20 A; VCC = 2.0 V - - 0.1 V =20 A; VCC = 4.5 V - - 0.1 V =20 A; VCC = 6.0 V - - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - - 0.33 V
IO = 7.8 mA; VCC = 6.0 V - - 0.33 V input leakage current VI =VCCor GND; VCC = 6.0 V; - - 1.0 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND; VCC = 6.0 V - - 5.0 A
ICC supply current VI =VCCor GND; IO = 0 A; VCC= 6.0V --80 A
Tamb= 40Cto +125C
VIH HIGH-level input voltage VCC = 2.0 V 1.5 - - V
VCC = 4.5 V 3.15- - V
VCC = 6.0 V 4.2 - - V
VIL LOW-level input voltage VCC = 2.0 V - - 0.5 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.8 V
VOH HIGH-level output voltage VI = VIH or VIL= 20 A; VCC = 2.0 V 1.9 - - V= 20 A; VCC = 4.5 V 4.4 - - V= 20 A; VCC = 6.0 V 5.9 - - V
IO = 6.0 mA; VCC = 4.5 V 3.7 - - V
IO = 7.8 mA; VCC = 6.0 V 5.2 - - V
VOL LOW-level output voltage VI = VIH or VIL =20 A; VCC = 2.0 V - - 0.1 V =20 A; VCC = 4.5 V - - 0.1 V =20 A; VCC = 6.0 V - - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - - 0.4 V input leakage current VI =VCCor GND; VCC = 6.0 V - - 1.0 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND; VCC = 6.0 V - - 10.0 A
ICC supply current VI =VCCor GND; IO = 0 A; VCC= 6.0V --160 A
Table 6. Static characteristics 74HC366 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Table 7. Static characteristics 74HCT366
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb =25C
VIH HIGH-level input voltage VCC= 4.5 V to 5.5V 2.0 1.6 - V
VIL LOW-level input voltage VCC= 4.5 V to 5.5V - 1.2 0.8 V
VOH HIGH-level output
voltage =VIHor VIL; VCC =4.5V= 20 A4.4 4.5 - V= 6.0 mA 3.98 4.32- V
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
VOL LOW-level output
voltage =VIHor VIL; VCC =4.5V =20 A- 0 0.1 V= 6.0 mA - 0.16 0.26 V input leakage current VI =VCCor GND; VCC =5.5V - - 0.1 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND per input pin; other
inputs at GND or VCC; IO =0A; VCC =5.5V 0.5 A
ICC supply current VI =VCCor GND; IO =0A; VCC= 5.5V - - 8.0 A
ICC additional supply current VI =VCC 2.1 V; other inputs at VCCor GND; IO =0A
pins nA - 100 360 A
pin OE1 - 100 360 A
pin OE2 -90 320 A input capacitance - 3.5 - pF
Tamb= 40 C to +85C
VIH HIGH-level input voltage VCC= 4.5 V to 5.5V 2.0 - - V
VIL LOW-level input voltage VCC= 4.5 V to 5.5V - - 0.8 V
VOH HIGH-level output
voltage =VIHor VIL; VCC =4.5V= 20 A4.4 - - V= 6.0 mA 3.84- - V
VOL LOW-level output
voltage =VIHor VIL; VCC =4.5V =20 A- - 0.1 V= 6.0 mA - - 0.33 V input leakage current VI =VCCor GND; VCC =5.5V - - 1.0 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND per input pin; other
inputs at GND or VCC; IO =0A; VCC =5.5V 5.0 A
ICC supply current VI =VCCor GND; IO =0A; VCC =5.5V - - 80 A
ICC additional supply current VI =VCC 2.1 V; other inputs at VCCor GND; IO =0A
pins nA - - 450 A
pin OE1 -- 450 A
pin OE2 -- 400 A
Tamb= 40 C to +125C
VIH HIGH-level input voltage VCC= 4.5 V to 5.5V 2.0 - - V
VIL LOW-level input voltage VCC= 4.5 V to 5.5V - - 0.8 V
VOH HIGH-level output
voltage =VIHor VIL; VCC =4.5V= 20 A4.4 - - V= 6.0 mA 3.7 - - V
VOL LOW-level output
voltage =VIHor VIL; VCC =4.5V =20 A- - 0.1 V =6.0 mA - - 0.4 V input leakage current VI =VCCor GND; VCC =5.5V - - 1.0 A
IOZ OFF-state output current VI = VIH or VIL; VO =VCCor GND per input pin; other
inputs at GND or VCC; IO =0A; VCC =5.5V 10.0 A
Table 7. Static characteristics 74HCT366 …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
10. Dynamic characteristics
ICC supply current VI =VCCor GND; IO =0A; VCC =5.5V - - 160 A
ICC additional supply current VI =VCC 2.1 V; other inputs at VCCor GND; IO =0A
pins nA - - 490 A
pin OE1 -- 490 A
pin OE2 -- 441 A
Table 7. Static characteristics 74HCT366 …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Table 8. Dynamic characteristics 74HC366
Voltages are referenced to GND (ground=0 V); CL = 50 pF unless otherwise specified; see test circuit Figure8.
Tamb =25C
tpd propagation delay nA to nY; see Figure6 [1]
VCC= 2.0V - 33 100 ns
VCC= 4.5V - 12 20 ns
VCC = 5 V; CL= 15 pF - 10 - ns
VCC= 6.0V - 10 17 ns
ten enable time OEn to nY; see Figure7 [2]
VCC= 2.0V - 44 150 ns
VCC= 4.5V - 16 30 ns
VCC= 6.0V - 13 26 ns
tdis disable time OEn to nY; see Figure7 [3]
VCC= 2.0V - 55 150 ns
VCC= 4.5V - 20 30 ns
VCC= 6.0V - 16 26 ns transition time see Figure6 [4]
VCC= 2.0V - 14 60 ns
VCC =4.5V - 5 12 ns
VCC =6.0V - 4 10 ns
CPD power dissipation
capacitance
per buffer; VI =GNDto VCC [5] -30 - pF
Tamb= 40 Cto+85C
tpd propagation delay nA to nY; see Figure6 [1]
VCC= 2.0V - - 125 ns
VCC= 4.5V --25 ns
VCC= 6.0V --21 ns
ten enable time OEn to nY; see Figure7 [2]
VCC= 2.0V - - 190 ns
VCC= 4.5V --38 ns
VCC= 6.0V --33 ns
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
[1] tpd is the same as tPHL and tPLH.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPHZ and tPLZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N + (CL VCC2 fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2fo)= sum of outputs.
tdis disable time OEn to nY; see Figure7 [3]
VCC= 2.0V - - 190 ns
VCC= 4.5V --38 ns
VCC= 6.0V --33 ns transition time see Figure6 [4]
VCC= 2.0V --75 ns
VCC= 4.5V --15 ns
VCC= 6.0V --13 ns
Tamb= 40Cto +125C
tpd propagation delay nA to nY; see Figure6 [1]
VCC= 2.0V - - 150 ns
VCC= 4.5V --30 ns
VCC= 6.0V --26 ns
ten enable time OEn to nY; see Figure7 [2]
VCC= 2.0V - - 225 ns
VCC= 4.5V --45 ns
VCC= 6.0V --38 ns
tdis disable time OEn to nY; see Figure7 [3]
VCC= 2.0V - - 225 ns
VCC= 4.5V --45 ns
VCC= 6.0V --38 ns transition time see Figure6 [4]
VCC= 2.0V --90 ns
VCC= 4.5V --18 ns
VCC= 6.0V --15 ns
Table 8. Dynamic characteristics 74HC366 …continued
Voltages are referenced to GND (ground=0 V); CL = 50 pF unless otherwise specified; see test circuit Figure8.
NXP Semiconductors 74HC366; 74HCT366
Hex buffer/line driver; 3-state; inverting
[1] tpd is the same as tPHL and tPLH.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPHZ and tPLZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N + (CL VCC2 fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2fo)= sum of outputs.
Table 9. Dynamic characteristics 74HCT366
Voltages are referenced to GND (ground=0 V); CL = 50 pF unless otherwise specified; see test circuit Figure8.
Tamb =25C
tpd propagation delay nA to nY; see Figure6 [1]
VCC= 4.5V - 13 24 ns
VCC =5 V; CL= 15 pF - 11 - ns
ten enable time OEn to nY; VCC= 4.5 V; see Figure7 [2]- 1635ns
tdis disable time OEn to nY; VCC= 4.5 V; see Figure7 [3]- 2035ns transition time VCC =4.5 V; see Figure6 [4]- 5 12 ns
CPD power dissipation
capacitance
per buffer; VI =GNDto (VCC 1.5 V) [5] -30 -pF
Tamb= 40 C to +85C
tpd propagation delay nA to nY; VCC =4.5 V; see Figure6 [1] --30 ns
ten enable time OEn to nY; VCC= 4.5 V; see Figure7 [2] --44 ns
tdis disable time OEn to nY; VCC= 4.5 V; see Figure7 [3] --44 ns transition time VCC =4.5 V; see Figure6 [4] --15 ns
Tamb= 40Cto +125C
tpd propagation delay nA to nY; VCC =4.5 V; see Figure6 [1] --36 ns
ten enable time OEn to nY; VCC= 4.5 V; see Figure7 [2] --53 ns
tdis disable time OEn to nY; VCC= 4.5 V; see Figure7 [3] --53 ns transition time VCC =4.5 V; see Figure6 [4] --18 ns

Partno	Mfg	Dc	Qty	Available	Descript
74HC366D	NXP	N/a	45520	avai	Hex buffer/line driver; 3-state; inverting
74HCT366D	NXP	N/a	4430	avai	74HC/HCT366; Hex buffer/line driver; 3-state; inverting