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74HC2G126DPNXPN/a54440avaiDual buffer/line driver; 3-state


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74HC2G126DP
Dual buffer/line driver; 3-state
1. General description
The 74HC2G126; 74HCT2G126 is a dual buffer/line driver with 3-state outputs controlled
by the output enable inputs (nOE). Inputs include clamp diodes. This enables the use of
current limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits Wide operating voltage from 2.0 V to 6.0V Input levels: For 74HC2G126: CMOS level For 74HCT2G126: TTL level Complies with JEDEC standard no. 7A Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 C to +85 C and 40 C to +125C
3. Ordering information
74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
Rev. 5 — 18 December 2013 Product data sheet
Table 1. Ordering information
74HC2G126DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
74HCT2G126DP
74HC2G126DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
SOT765-1
74HCT2G126DC
74HC2G126GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no leads; terminals; body 3  2  0.5 mm
SOT996-2
74HCT2G126GD
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
Table 2. Marking codes[1]
74HC2G126DP H26
74HCT2G126DP T26
74HC2G126DC H26
74HCT2G126DC T26
74HC2G126GD H26
74HCT2G126GD T26
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
6.2 Pin description
7. Functional description
[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z= high-impedance OFF-state.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C the value of Ptot derates linearly with 8 mW/K.
For XSON8 package: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
Table 3. Pin description
1OE, 2OE 1, 7 output enable input
1A, 2A 2, 5 data input, 2Y 6, 3 data output
GND 4 ground (0 V)
VCC 8 supply voltage
Table 4. Function table[1] L
HHH Z
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V or VI >VCC +0.5 V [1]- 20 mA
IOK output clamping current VO< 0.5 V or VO >VCC +0.5V [1]- 20 mA output current VO= 0.5 V to (VCC +0.5V) [1]- 35 mA
ICC supply current - 70 mA
IGND ground current 70 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]- 300 mW
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
9. Recommended operating conditions
10. Static characteristics
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate
VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb =25 C.
74HC2G126
VIH HIGH-level input
voltage
VCC = 2.0 V 1.5 1.2 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - V
VIL LOW-level input
voltage
VCC = 2.0 V - 0.8 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 V
VOH HIGH-level
output voltage = VIH or VIL
IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - V
IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - V
IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - V
IO = 6.0 mA; VCC = 4.5 V 3.84 4.32 - 3.7 - V
IO = 7.8 mA; VCC = 6.0 V 5.34 5.81 - 5.2 - V
VOL LOW-level output
voltage = VIH or VIL
IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 V
IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 V
IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 V
IO = 6.0 mA; VCC = 4.5 V - 0.15 0.33 - 0.4 V
IO = 7.8 mA; VCC = 6.0 V - 0.16 0.33 - 0.4 V input leakage
current =VCCor GND; VCC =6.0V - - 1.0 - 1.0 A
IOZ OFF-state output
current
VI = VIH or VIL; =VCCor GND; VCC = 6.0 V 5.0 - 10 A
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
11. Dynamic characteristics
ICC supply current VI =VCCor GND; IO =0A;
VCC =6.0V 10 - 20 A input capacitance - 1.0 - - - pF output
capacitance
-1.5 - - - pF
74HCT2G126
VIH HIGH-level input
voltage
VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V
VIL LOW-level input
voltage
VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 V
VOH HIGH-level
output voltage = VIH or VIL; VCC = 4.5 V
IO = 20 A 4.4 4.5 - 4.4 - V
IO = 6.0 mA 3.84 4.32 - 3.7 - V
VOL LOW-level output
voltage = VIH or VIL; VCC = 4.5 V
IO = 20 A - 0 0.1 - 0.1 V
IO = 6.0 mA - 0.16 0.33 - 0.4 V input leakage
current =VCCor GND; VCC =5.5V - - 1.0 - 1.0 A
IOZ OFF-state output
current
VI = VIH or VIL; VO =
VCCor GND; VCC = 5.5 V 5.0 - 10
ICC supply current VI =VCCor GND; IO =0A;
VCC =5.5V 10 - 20 A
ICC additional supply
current
per input; VCC= 4.5Vto 5.5V; =VCC 2.1 V; IO =0A - 375 - 410 A input capacitance - 1.0 - - - pF output
capacitance
-1.5 - - - pF
Table 7. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb =25 C.
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL=50 pF unless otherwise specified; for test circuit see Figure8.
74HC2G126
tpd propagation
delayto nY; see Figure6 [2]
VCC = 2.0 V - 35 115 - 135 ns
VCC = 4.5 V - 11 23 - 27 ns
VCC = 5.0 V; CL =15pF - 10 - - - ns
VCC = 6.0 V - 8 20 - 23 ns
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
[1] All typical values are measured at Tamb = 25 C.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PDin W). =CPD VCC2fi N+ (CL VCC2fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance inpF;
VCC= supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
ten enable time nOEto nY; see Figure7 [2]
VCC = 2.0 V - 40 115 - 135 ns
VCC = 4.5 V - 11 23 - 27 ns
VCC = 6.0 V - 8 20 - 23 ns
tdis disable time nOEto nY; see Figure7 [2]
VCC = 2.0 V - 25 125 - 150 ns
VCC = 4.5 V - 12 25 - 30 ns
VCC = 6.0 V - 10 21 - 26 ns transition
time
nY; see Figure6 [2]
VCC = 2.0 V - 18 75 - 90 ns
VCC = 4.5 V - 6 15 - 18 ns
VCC = 6.0 V - 5 13 - 15 ns
CPD power
dissipation
capacitance
per buffer; VI =GNDto VCC [3]
output enabled - 11 - - - pF
output disabled - 1 - - - pF
74HCT2G126
tpd propagation
delayto nY; see Figure6 [2]
VCC = 4.5 V - 15 30 - 36 ns
VCC = 5.0 V; CL =15pF - 12 - - - ns
ten enable time nOEto nY; see Figure7;
VCC =4.5V
[2] - 11 31 - 38 ns
tdis disable time nOEto nY; see Figure7;
VCC =4.5V
[2] - 11 35 - 42 ns transition
time
nY; see Figure 6; VCC = 4.5 V [2] -6 15 - 18 ns
CPD power
dissipation
capacitance
per buffer; =GNDto VCC 1.5V
[3]
output enabled - 11 - - - pF
output disabled - 1 - - - pF
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL=50 pF unless otherwise specified; for test circuit see Figure8.
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
12. Waveforms
Table 9. Measurement points
74HC2G126 0.5VCC 0.5VCC VOL +0.3V VOH 0.3V
74HCT2G126 1.3 V 1.3 V VOL +0.3V VOH 0.3V
NXP Semiconductors 74HC2G126; 74HCT2G126
Dual buffer/line driver; 3-state
Table 10. Test data
74HC2G126 GND to VCC  6ns 15 pF, 50 pF 1 k open GND VCC
74HCT2G126 GND to 3V  6ns 15 pF, 50 pF 1 k open GND VCC
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