74HC259D ,8-bit addressable latchINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC259N ,8-bit addressable latchPin configuration (DIP16, SO16, SSOP16 and Fig 5.
74HC259PW ,74HC/HCT259; 8-bit addressable latchapplications should only be done while in the memory mode. The modein digital systems. The “259” ar ..
74HC273BQ ,Octal D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTION• Ideal buffer for MOS microprocessor or memory The 74HC/HCT273 are high-speed S ..
74HC273D ,Octal D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC273DB ,Octal D-type flip-flop with reset; positive-edge triggerFeatures and benefits Input levels: For 74HC273: CMOS level For 74HCT273: TTL level Common cloc ..
74LVC2G74DP ,Single D-type flip-flop with set and reset; positive edge triggerFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for inte ..
74LVC2G74GD ,Single D-type flip-flop with set and reset; positive edge triggerGeneral descriptionThe 74LVC2G74 is a single positive-edge triggered D-type flip-flop with individu ..
74LVC2G86DP ,Dual 2-input EXCLUSIVE-OR gateGeneral descriptionThe 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate.Inputs can be driven fro ..
74LVC2G86GD ,Dual 2-input EXCLUSIVE-OR gateFeatures and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for inte ..
74LVC2GU04GM ,Dual inverterfeatures allow the use of these devices in a mixed– HBM EIA/JESD22-A114-B exceeds 2000 V3.3 V and 5 ..
74LVC2GU04GM ,Dual inverterFEATURES DESCRIPTION• Wide supply voltage range from 1.65 V to 5.5 V The 74LVC2GU04 is a high-perfo ..
74HC259D-74HC259PW-74HCT259D-74HCT259N
74HC/HCT259; 8-bit addressable latch
Philips Semiconductors Product specification
8-bit addressable latch 74HC/HCT259
FEATURES Combines demultiplexer and 8-bit latch Serial-to-parallel capability Output from each storage bit available Random (addressable) data entry Easily expandable Common reset input Useful as a 3-to-8 active HIGH decoder Output capability: standard ICC category: MSI
GENERAL DESCRIPTIONThe 74HC/HCT259 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT259 are high-speed 8-bit addressable
latches designed for general purpose storage applications
in digital systems. The “259” are multifunctional devices
capable of storing single-line data in eight addressable
latches, and also 3-to-8 decoder and demultiplexer, with
active HIGH outputs (Q0 to Q7), functions are available.
The “259” also incorporates an active LOW common reset
(MR) for resetting all latches, as well as, an active LOW
enable input (LE).
The “259” has four modes of operation as shown in the
mode select table. In the addressable latch mode, data on
the data line (D) is written into the addressed latch. The
addressed latch will follow the data input with all
non-addressed latches remaining in their previous states.
In the memory mode, all latches remain in their previous
states and are unaffected by the data or address inputs.
In the 3-to-8 decoding or demultiplexing mode, the
addressed output follows the state of the D input with all
other outputs in the LOW state. In the reset mode all
outputs are LOW and unaffected by the address (A0 to A2)
and data (D) input. When operating the “259” as an
addressable latch, changing more than one bit of address
could impose a transient-wrong address. Therefore, this
should only be done while in the memory mode. The mode
select table summarizes the operations of the “259”.
QUICK REFERENCE DATAGND= 0 V; Tamb =25 °C; tr =tf= 6 ns
Notes CPD is used to determine the dynamic power dissipation (PD in μW): =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:= input frequency in MHz= output frequency in MHz
∑ (CL × VCC2 × fo)= sum of outputs= output load capacitance in pF
VCC= supply voltage in V For HC the condition is VI= GND to VCC
Philips Semiconductors Product specification
8-bit addressable latch 74HC/HCT259
ORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
Philips Semiconductors Product specification
8-bit addressable latch 74HC/HCT259
MODE SELECT TABLE
Philips Semiconductors Product specification
8-bit addressable latch 74HC/HCT259
FUNCTION TABLE
Notes H= HIGH voltage level= LOW voltage level= don’t care= HIGH or LOW data one set-up time prior to the LOW-to-HIGH LE transition= lower case letters indicate the state of the referenced output established during the last cycle in which it was
addressed or cleared
Philips Semiconductors Product specification
8-bit addressable latch 74HC/HCT259
