74HC238PW-74HCT238BQ-74HCT238PW Fast Delivery |IC PHOENIX CO.,LIMITED

74HC238PW ,3-to-8 line decoder/demultiplexerFeaturesn Demultiplexing capabilityn Multiple input enable for easy expansionn Ideal for memory chi ..
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74HC238PW-74HCT238BQ-74HCT238PW
3-to-8 line decoder/demultiplexer
General description74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1,
A2) and when enabled, provide8 mutually exclusive active HIGH outputs (Y0to Y7). The
74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one
active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the “238” to a 1-to-32 (5
linesto32 lines) decoder with just four “238” ICs and one inverter. The “238” canbe usedan eight output demultiplexerby using oneof the active LOW enable inputsas the data
input and the remaining enable inputs as strobes. Unused enable inputs must be
permanently tied to their appropriate active HIGH or LOW state.
The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting
outputs. Features Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active HIGH mutually exclusive outputs Multiple package options Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V Speciﬁed from −40 °Cto+85 °C and from −40°Cto +125°C
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 03 — 16 July 2007 Product data sheet
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer Ordering information Functional diagram
Table 1. Ordering information
74HC238N −40 °C to +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC238D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC238DB −40 °C to +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HC238PW −40 °C to +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HC238BQ −40 °C to +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad ﬂat package; no leads; 16 terminals;
body 2.5× 3.5× 0.85 mm
SOT763-1
74HCT238N −40 °C to +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HCT238D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT238DB −40 °C to +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74HCT238PW −40 °C to +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74HCT238BQ −40 °C to +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin
quad ﬂat package; no leads; 16 terminals;
body 2.5× 3.5× 0.85 mm
SOT763-1
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer Pinning information
5.1 Pinning
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
5.2 Pin description Functional description
[1]H= HIGH voltage level;= LOW voltage level;= don’t care.
Table 2. Pin description
A[0:2] 1, 2, 3 address input 4 enable input (active LOW) 5 enable input (active LOW) 6 enable input (active HIGH)
Y[0:7] 15, 14, 13, 12, 11, 10, 9, 7 output (active HIGH)
GND 8 ground (0V)
VCC 16 supply voltage
Table 3. Function table[1] X X X X X L LLLLLLL H X X X X L LLLLLLL X LX X X LLLLLLLL
LLH L LLH L LLLLLL
LLH H L LLH LLLLLL
LLH L H LLLH LLLLL
LLH H H LLLLH LLLL
LLH L LH LLLLH LLL
LLH H L H L LLLLH LL
LLH L H H LLLLLLH L
LLH H H H L LLLLLLH
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly at 12 mW/K.
[3] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage −0.5 +7 V
IIK input clamping current VI < −0.5 V or VI >VCC+ 0.5 V [1]- ±20 mA
IOK output clamping current VO< −0.5 V or VO >VCC+ 0.5V [1]- ±20 mA output current −0.5 V < VO < VCC+ 0.5V - ±25 mA
ICC supply current - 50 mA
IGND ground current −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation DIP16 package [2]- 750 mW
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
[3]- 500 mW
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature −40 - +125 −40 - +125 °C
Δt/ΔV input transition rise
and fall rate
VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
74HC238
VIH HIGH-level
input voltage
VCC= 2.0V 1.5 1.2 - 1.5 - 1.5 - V
VCC= 4.5V 3.15 2.4 - 3.15 - 3.15 - V
VCC= 6.0V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage
VCC= 2.0V - 0.8 0.5 - 0.5 - 0.5 V
VCC= 4.5V - 2.1 1.35 - 1.35 - 1.35 V
VCC= 6.0V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage =VIHorVIL= −20 μA; VCC= 2.0V 1.9 2.0 - 1.9 - 1.9 - V= −20 μA; VCC= 4.5V 4.4 4.5 - 4.4 - 4.4 - V= −20 μA; VCC= 6.0V 5.9 6.0 - 5.9 - 5.9 - V= −4.0 mA; VCC= 4.5V 3.98 4.32 - 3.84 - 3.7 - V= −5.2 mA; VCC= 6.0V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage =VIHorVIL =20 μA; VCC= 2.0V - 0 0.1 - 0.1 - 0.1 V =20 μA; VCC= 4.5V - 0 0.1 - 0.1 - 0.1 V =20 μA; VCC= 6.0V - 0 0.1 - 0.1 - 0.1 V= 4.0 mA; VCC= 4.5V - 0.15 0.26 - 0.33 - 0.4 V= 5.2 mA; VCC= 6.0V - 0.16 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND;
VCC= 6.0V ±0.1 - ±1.0 - ±1.0 μA
ICC supply current VI =VCCor GND; IO =0A;
VCC= 6.0V - 8.0 - 80 - 160 μA input
capacitance 3.5 - - - - - pF
74HCT238
VIH HIGH-level
input voltage
VCC= 4.5 V to 5.5V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC= 4.5 V to 5.5V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage =VIHor VIL; VCC= 4.5V= −20μA 4.4 4.5 - 4.4 - 4.4 - V= −4.0 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage =VIHor VIL; VCC= 4.5V =20μA - 0 0.1 - 0.1 - 0.1 V= 4.0 mA - 0.16 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND;
VCC= 5.5V ±0.1 - ±1.0 - ±1.0 μA
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
10. Dynamic characteristics
ICC supply current VI =VCCor GND;
VCC= 5.5 V; IO =0A - 8.0 - 80 - 160 μA
ΔICC additional
supply current
per input pin; =VCC− 2.1V;
other inputsat VCCor GND;
VCC= 4.5Vto 5.5V; =0A
An inputs - 70 252 - 315 - 343 μA
E1, E2 inputs - 40 144 - 180 - 196 μA
E3 input - 145 522 - 653 - 711 μA input
capacitance 3.5 - - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Table 7. Dynamic characteristics
GND=0 V; test circuit see Figure8.
74HC238
tpd propagation delay An to Yn; see Figure6 [1]
VCC = 2.0 V - 47 150 190 225 ns
VCC = 4.5 V - 17 30 38 45 ns
VCC = 5.0 V; CL =15pF - 14 - - - ns
VCC = 6.0 V - 14 26 33 38 ns
E3 to Yn; see Figure6 [1]
VCC = 2.0 V - 52 160 200 240 ns
VCC = 4.5 V - 19 32 40 48 ns
VCC = 5.0 V; CL =15pF - 16 - - - ns
VCC = 6.0 V - 15 27 34 41 ns
En to Yn or see Figure7 [1]
VCC = 2.0 V - 50 155 195 235 ns
VCC = 4.5 V - 18 31 39 47 ns
VCC = 5.0 V; CL =15pF - 17 - - - ns
VCC = 6.0 V - 14 26 33 40 ns transition time see Figure6 and Figure7 [2]
VCC = 2.0 V - 19 75 95 110 ns
VCC = 4.5 V - 7 15 19 22 ns
VCC = 6.0 V - 6 13 16 19 ns
CPD power dissipation
capacitance
per package; VI= GNDto VCC [3] -72- - - pF
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPDis used to determine the dynamic power dissipation (PD in μW): =CPD× VCC2×fi× N+ ∑ (CL× VCC2× fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;(CL× VCC2×fo)= sum of outputs.
11. Waveforms
74HCT238
tpd propagation delay An to Yn; see Figure6 [1]
VCC = 4.5 V - 19 35 44 53 ns
VCC = 5.0 V; CL =15pF - 18 - - - ns
E3 to Yn; see Figure6 [1]
VCC = 4.5 V - 20 37 46 56 ns
VCC = 5.0 V; CL =15pF - 20 - - - ns
En to Yn or see Figure7 [1]
VCC = 4.5 V - 20 35 44 53 ns
VCC = 5.0 V; CL =15pF - 21 - - - ns transition time VCC = 4.5 V;
see Figure6 and Figure7
[2] - 7 15 19 22 ns
CPD power dissipation
capacitance
per package;= GNDto VCC− 1.5V
[3] -76- - - pF
Table 7. Dynamic characteristics
GND=0 V; test circuit see Figure8.
NXP Semiconductors 74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Table 8. Measurement points
74HC238 0.5VCC 0.5VCC 0.1VCC 0.9VCC
74HCT238 1.3V 1.3V 0.1VCC 0.9VCC

Partno	Mfg	Dc	Qty	Available	Descript
74HC238PW	NXP	N/a	45520	avai	3-to-8 line decoder/demultiplexer
74HCT238BQ	NXP	N/a	3000	avai	3-to-8 line decoder/demultiplexer
74HCT238PW	NXP	N/a	438	avai	3-to-8 line decoder/demultiplexer