74HC237D-74HC237N Fast Delivery |IC PHOENIX CO.,LIMITED

74HC237D ,74HC237; 3-to-8 line decoder, demultiplexer with address latchesGeneral descriptionThe 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low p ..
74HC237N ,74HC237; 3-to-8 line decoder, demultiplexer with address latchesGeneral descriptionThe 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low p ..
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74LVC1G57DW-7 , CONFIGURABLE MULTIPLE-FUNCTION GATE

74HC237D-74HC237N
74HC237; 3-to-8 line decoder, demultiplexer with address latches
General descriptionThe 74HC237isa high-speed Si-gate CMOS device andis pin compatible with low power
Schottky TTL (LSTTL). The 74HC237 is speciﬁed in compliance with JEDEC
standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address
inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit
storage latch. When the latchis enabled (LE= LOW), the 74HC237 actsasa 3-to-8 active
LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present
at the inputs before this transition, is stored in the latches. Further address changes are
ignored as long as LE remains HIGH.
The output enable input (E1 and E2) controls the state of the outputs independent of the
address inputsor latch operation.All outputs are HIGH unless E1is LOW and E2is HIGH.
The 74HC237 is ideally suited for implementing non-overlapping decoders in 3-state
systems and strobed (stored address) applications in bus oriented systems. Features Combines 3-to-8 decoder with 3-bit latch Multiple input enable for easy expansion or independent controls Active HIGH mutually exclusive outputs Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-B exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V. Multiple package options Speciﬁed from −40 °Cto+80 °C and from −40°Cto +125 °C.
74HC237
3-to-8 line decoder, demultiplexer with address latches
Philips Semiconductors 74HC237 Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ ∑(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in V;= number of inputs switching;
∑(CL× VCC2×fo) = sum of outputs. Ordering information
Table 1: Quick reference data
GND= 0 V; Tamb =25 °C; tr =tf= 6 ns.
tPHL, tPLH propagation delay CL= 15 pF; VCC =5 V
An to Yn - 16 - ns
LE to Yn - 19 - ns
E1 to Yn - 14 - ns
E2 to Yn - 14 - ns input capacitance - 3.5 - pF
CPD power dissipation
capacitance= GND to VCC [1] -60 - pF
Table 2: Ordering information
74HC237N −40 °C to +125°C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
74HC237D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC237DB −40 °C to +125°C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
Philips Semiconductors 74HC237 Functional diagram
Philips Semiconductors 74HC237 Pinning information
6.1 Pinning
Philips Semiconductors 74HC237
6.2 Pin description Functional description
7.1 Function table
[1]H= HIGH voltage level;= LOW voltage level;= don’t care.
Table 3: Pin description 1 data input 0 2 data input 1 3 data input 2 4 latch enable input (active LOW) 5 data enable input 1 (active LOW) 6 data enable input 2 (active HIGH) 7 multiplexer output 7
GND 8 ground (0 V) 9 multiplexer output 6 10 multiplexer output 5 11 multiplexer output 4 12 multiplexer output 3 13 multiplexer output 2 14 multiplexer output 1 15 multiplexer output 0
VCC 16 positive supply voltage
Table 4: Function table
Philips Semiconductors 74HC237 Limiting values
[1] Above 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above 70 °C: Ptot derates linearly with 8 mW/K. Recommended operating conditions
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
VCC supply voltage −0.5 +7 V
IIK input diode current VI < −0.5 V or VI >VCC+ 0.5 V - ±20 mA
IOK output diode current VO< −0.5 V or >VCC+ 0.5V ±20 mA output source or sink
current
VO = −0.5 V to VCC+ 0.5V - ±25 mA
ICC, IGND VCC or GND current - ±50 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation
DIP16 package [1]- 750 mW
SO16 and SSOP16
packages
[2]- 500 mW
Table 6: Recommended operating conditions
VCC supply voltage 2.0 5.0 6.0 V input voltage 0 - VCC V output voltage 0 - VCC V
tr, tf input rise and fall
times
VCC = 2.0 V - - 1000 ns
VCC = 4.5 V - 6.0 500 ns
VCC = 6.0 V - - 400 ns
Tamb ambient
temperature
−40 - +125 °C
Philips Semiconductors 74HC237
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb =25°C
VIH HIGH-level input voltage VCC= 2.0V 1.5 1.2 - V
VCC= 4.5V 3.15 2.4 - V
VCC= 6.0V 4.2 3.2 - V
VIL LOW-level input voltage VCC= 2.0V - 0.8 0.5 V
VCC= 4.5V - 2.1 1.35 V
VCC= 6.0V - 2.8 1.8 V
VOH HIGH-level output voltage VI =VIHorVIL= −20 μA; VCC= 2.0V 1.9 2.0 - V= −20 μA; VCC= 4.5V 4.4 4.5 - V= −20 μA; VCC= 6.0V 5.9 6.0 - V=−4 mA; VCC= 4.5V 3.98 4.32 - V= −5.2 mA; VCC= 6.0V 5.48 5.81 - V
VOL LOW-level output voltage VI =VIHorVIL =20 μA; VCC= 2.0V - 0 0.1 V =20 μA; VCC= 4.5V - 0 0.1 V =20 μA; VCC= 6.0V - 0 0.1 V=4 mA; VCC= 4.5V - 0.15 0.26 V= 5.2 mA; VCC= 6.0V - 0.16 0.26 V
ILI input leakage current VI =VCCor GND; VCC= 6.0V - - ±0.1 μA
ICC quiescent supply current VI =VCCor GND; IO =0A;
VCC= 6.0V - 8.0 μA input capacitance - 3.5 - pF
Tamb= −40 °C to +85°C
VIH HIGH-level input voltage VCC= 2.0V 1.5 - - V
VCC= 4.5V 3.15 - - V
VCC= 6.0V 4.2 - - V
VIL LOW-level input voltage VCC= 2.0V - - 0.5 V
VCC= 4.5V - - 1.35 V
VCC= 6.0V - - 1.8 V
VOH HIGH-level output voltage VI =VIHorVIL= −20 μA; VCC= 2.0V 1.9 - - V= −20 μA; VCC= 4.5V 4.4 - - V= −20 μA; VCC= 6.0V 5.9 - - V=−4 mA; VCC= 4.5V 3.84 - - V= −5.2 mA; VCC= 6.0V 5.34 - - V
Philips Semiconductors 74HC237
VOL LOW-level output voltage VI =VIHorVIL =20 μA; VCC= 2.0V - - 0.1 V =20 μA; VCC= 4.5V - - 0.1 V =20 μA; VCC= 6.0V - - 0.1 V=4 mA; VCC= 4.5V - - 0.33 V= 5.2 mA; VCC= 6.0V - - 0.33 V
ILI input leakage current VI =VCCor GND; VCC= 6.0V - - ±1.0 μA
ICC quiescent supply current VI =VCCor GND; IO =0A;
VCC= 6.0V
--80 μA
Tamb= −40 °C to +125°C
VIH HIGH-level input voltage VCC= 2.0V 1.5 - - V
VCC= 4.5V 3.15 - - V
VCC= 6.0V 4.2 - - V
VIL LOW-level input voltage VCC= 2.0V - - 0.5 V
VCC= 4.5V - - 1.35 V
VCC= 6.0V - - 1.8 V
VOH HIGH-level output voltage VI =VIHorVIL= −20 μA; VCC= 2.0V 1.9 - - V= −20 μA; VCC= 4.5V 4.4 - - V= −20 μA; VCC= 6.0V 5.9 - - V=−4 mA; VCC= 4.5V 3.7 - - V= −5.2 mA; VCC= 6.0V 5.2 - - V
VOL LOW-level output voltage VI =VIHorVIL =20 μA; VCC= 2.0V - - 0.1 V =20 μA; VCC= 4.5V - - 0.1 V =20 μA; VCC= 6.0V - - 0.1 V=4 mA; VCC= 4.5V - - 0.4 V= 5.2 mA; VCC= 6.0V - - 0.4 V
ILI input leakage current VI =VCCor GND; VCC= 6.0V - - ±1.0 μA
ICC quiescent supply current VI =VCCor GND; IO =0A;
VCC= 6.0V - 160 μA
Table 7: Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors 74HC237
11. Dynamic characteristics
Table 8: Dynamic characteristics
GND= 0 V; tr=tf= 6 ns; CL= 50 pF; see Figure9.
Tamb = 25°C
tPHL, tPLH propagation delay An to Yn see Figure6
VCC = 2.0 V - 52 160 ns
VCC = 4.5 V - 19 32 ns
VCC = 6.0 V - 15 27 ns
VCC= 5.0V;CL=15pF - 16 - ns
propagation delay LE to Yn see Figure6
VCC = 2.0 V - 61 190 ns
VCC = 4.5 V - 22 38 ns
VCC = 6.0 V - 18 32 ns
VCC= 5.0V;CL=15pF - 19 - ns
propagation delay E1to Yn see Figure7
VCC = 2.0 V - 47 145 ns
VCC = 4.5 V - 17 29 ns
VCC = 6.0 V - 14 25 ns
VCC= 5.0V;CL=15pF - 14 - ns
propagation delay E2 to Yn see Figure6
VCC = 2.0 V - 47 145 ns
VCC = 4.5 V - 17 29 ns
VCC = 6.0 V - 14 25 ns
VCC= 5.0V;CL=15pF - 14 - ns
tTHL, tTLH output transition time see Figure7
VCC = 2.0 V - 19 75 ns
VCC = 4.5 V - 7 15 ns
VCC = 6.0 V - 6 13 ns LE pulse width HIGH see Figure8
VCC = 2.0 V 50 11 - ns
VCC = 4.5 V 10 4 - ns
VCC = 6.0 V 9 3 - ns
tsu set-up time An toLE see Figure8
VCC = 2.0 V 50 6 - ns
VCC = 4.5 V 10 2 - ns
VCC = 6.0 V 9 2 - ns hold time An toLE see Figure8
VCC = 2.0 V 30 3 - ns
VCC = 4.5 V 6 1 - ns
VCC = 6.0 V 5 1 - ns
CPD power dissipation capacitance VI= GND to VCC [1] -60 - pF
Philips Semiconductors 74HC237
Tamb = −40 °C to +85°C
tPHL, tPLH propagation delay An to Yn see Figure6
VCC = 2.0 V - - 200 ns
VCC = 4.5 V - - 40 ns
VCC = 6.0 V - - 34 ns
propagation delay LE to Yn see Figure6
VCC = 2.0 V - - 240 ns
VCC = 4.5 V - - 48 ns
VCC = 6.0 V - - 41 ns
propagation delay E1 to Yn see Figure7
VCC = 2.0 V - - 180 ns
VCC = 4.5 V - - 36 ns
VCC = 6.0 V - - 31 ns
propagation delay E2 to Yn see Figure6
VCC = 2.0 V - - 180 ns
VCC = 4.5 V - - 36 ns
VCC = 6.0 V - - 31 ns
tTHL, tTLH output transition time see Figure7
VCC = 2.0 V - - 95 ns
VCC = 4.5 V - - 19 ns
VCC = 6.0 V - - 16 ns LE pulse width HIGH see Figure8
VCC = 2.0 V 65 - - ns
VCC = 4.5 V 13 - - ns
VCC = 6.0 V 11 - - ns
tsu set-up time An toLE see Figure8
VCC = 2.0 V 65 - - ns
VCC = 4.5 V 13 - - ns
VCC = 6.0 V 11 - - ns hold time An toLE see Figure8
VCC = 2.0 V 40 - - ns
VCC = 4.5 V 8 - - ns
VCC = 6.0 V 7 - - ns
Table 8: Dynamic characteristics …continued
GND= 0 V; tr=tf= 6 ns; CL= 50 pF; see Figure9.

Partno	Mfg	Dc	Qty	Available	Descript
74HC237D	PHI	N/a	5000	avai	74HC237; 3-to-8 line decoder, demultiplexer with address latches
74HC237N	PHILIPS	N/a	4	avai	74HC237; 3-to-8 line decoder, demultiplexer with address latches
74HC237N	PHI	N/a	1100	avai	74HC237; 3-to-8 line decoder, demultiplexer with address latches