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74HC1G32GW-74HCT1G32GV-74HCT1G32GW
2-input OR gate
General description74HC1G32 and 74HCT1G32 are high-speed Si-gate CMOS devices. They provide a
2-input OR function.
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
The standard output currents are half those of the 74HC32 and 74HCT32.
Features Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options
Ordering information Marking
74HC1G32; 74HCT1G32
2-input OR gate
Rev. 05 — 14 March 2008 Product data sheet
Table 1. Ordering information74HC1G32GW −40 °C to +125°C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74HCT1G32GW
74HC1G32GV −40 °C to +125°C SC-74A plastic surface-mounted package; 5 leads SOT753
74HCT1G32GV
Table 2. Marking codes74HC1G32GW HG
74HCT1G32GW TG
74HC1G32GV H32
74HCT1G32GV T32
NXP Semiconductors 74HC1G32; 74HCT1G32
2-input OR gate Functional diagram Pinning information
6.1 Pinning
6.2 Pin description
Table 3. Pin description 1 data input B 2 data input A
GND 3 ground (0 V) 4 data output Y
VCC 5 supply voltage
NXP Semiconductors 74HC1G32; 74HCT1G32
2-input OR gate Functional description Limiting values[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 55 °C the value of Ptot derates linearly with 2.5 mW/K.
Recommended operating conditions
Table 4. Function tableH = HIGH voltage level; L = LOW voltage level
LLL H H
HHH
Table 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).[1]
VCC supply voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5 V or VI >VCC + 0.5V - ±20 mA
IOK output clamping current VO< −0.5 V or VO >VCC + 0.5V - ±20 mA output current −0.5 V < VO
ICC supply current - 25 mA
IGND ground current −25 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40°Cto +125°C [2]- 200 mW
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C
Δt/ΔV input transition rise
and fall rate
VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - - 139 - - 139 ns/V
VCC = 6.0 V - - 83 - - - ns/V
NXP Semiconductors 74HC1G32; 74HCT1G32
2-input OR gate
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb =25 °C.
74HC1G32
VIH HIGH-level input
voltage
VCC = 2.0 V 1.5 1.2 - 1.5 - V
VCC = 4.5 V 3.15 2.4 - 3.15 - V
VCC = 6.0 V 4.2 3.2 - 4.2 - V
VIL LOW-level input
voltage
VCC = 2.0 V - 0.8 0.5 - 0.5 V
VCC = 4.5 V - 2.1 1.35 - 1.35 V
VCC = 6.0 V - 2.8 1.8 - 1.8 V
VOH HIGH-level output
voltage = VIH or VIL= −20 μA; VCC= 2.0V 1.9 2.0 - 1.9 - V= −20 μA; VCC= 4.5V 4.4 4.5 - 4.4 - V= −20 μA; VCC= 6.0V 5.9 6.0 - 5.9 - V= −2.0 mA; VCC= 4.5V 4.13 4.32 - 3.7 - V= −2.6 mA; VCC= 6.0V 5.63 5.81 - 5.2 - V
VOL LOW-level output
voltage = VIH or VIL = 20 μA; VCC= 2.0V - 0 0.1 - 0.1 V = 20 μA; VCC= 4.5V - 0 0.1 - 0.1 V = 20 μA; VCC= 6.0V - 0 0.1 - 0.1 V = 2.0 mA; VCC= 4.5V - 0.15 0.33 - 0.4 V = 2.6 mA; VCC= 6.0V - 0.16 0.33 - 0.4 V input leakage current VI =VCCor GND; VCC= 6.0V - - 1.0 - 1.0 μA
ICC supply current VI =VCCor GND; IO =0A;
VCC= 6.0V - 10 - 20 μA input capacitance - 1.5 - - - pF
74HCT1G32
VIH HIGH-level input
voltage
VCC = 4.5 V to 5.5V 2.0 1.6 - 2.0 - V
VIL LOW-level input
voltage
VCC = 4.5 V to 5.5V - 1.2 0.8 - 0.8 V
VOH HIGH-level output
voltage = VIH or VIL; VCC= 4.5V= −20μA 4.4 4.5 - 4.4 - V= −2.0 mA 4.13 4.32 - 3.7 - V
VOL LOW-level output
voltage = VIH or VIL; VCC= 4.5V = 20μA - 0 0.1 - 0.1 V = 2.0 mA - 0.15 0.33 - 0.4 V input leakage current VI =VCCor GND; VCC= 5.5V - - 1.0 - 1.0 μA
NXP Semiconductors 74HC1G32; 74HCT1G32
2-input OR gate
11. Dynamic characteristics
[1] tpd is the same as tPLH and tPHL.
[2] CPD is used to determine the dynamic power dissipation PD (μW). =CPD× VCC2×fi+∑(CL× VCC2×fo) where:= input frequency in MHz= output frequency in MHz= output load capacitance in pF
VCC= supply voltage in V(CL× VCC2× fo) = sum of outputs
ICC supply current VI =VCCor GND; IO =0A;
VCC= 5.5V - 10 - 20 μA
ΔICC additional supply
current
per input; VCC= 4.5 V to 5.5V; =VCC− 2.1 V; IO =0A - 500 - 850 μA input capacitance - 1.5 - - - pF
Table 7. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb =25 °C.
Table 8. Dynamic characteristics
GND = 0 V; tr = tf ≤ 6.0 ns. All typical values are measured at Tamb =25 °C. For test circuit see Figure6
74HC1G32
tpd propagation delayA and B to Y; see Figure5 [1]
VCC = 2.0 V; CL=50pF - 18 115 - 135 ns
VCC = 4.5 V; CL =50pF - 8 23 - 27 ns
VCC = 5.0 V; CL =15pF - 8 - - - ns
VCC = 6.0 V; CL =50pF - 7 20 - 23 ns
CPD power dissipation
capacitance= GNDto VCC [2] -19- - - pF
74HCT1G32
tpd propagation delayA and B to Y; see Figure5 [1]
VCC = 4.5 V; CL=50pF - 10 24 - 27 ns
VCC = 5.0 V; CL =15pF - 10 - - - ns
CPD power dissipation
capacitance= GNDto VCC− 1.5V [2] -20- - - pF
NXP Semiconductors 74HC1G32; 74HCT1G32
2-input OR gate
12. Waveforms