74HC126DB ,Quad buffer/line driver; 3-stateGENERAL DESCRIPTIONThe 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with ..
74HC126N ,74HC/HCT126; Quad buffer/line driver; 3-stateGENERAL DESCRIPTIONThe 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with ..
74HC126PW ,Quad buffer/line driver; 3-statePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnOE nA n ..
74HC132 ,Quad 2-input NAND Schmitt triggerMAXIMUM RATINGSSymbol Parameter Value UnitV Positive DC Supply Voltage 0.5 to 7.0 VCCV Digital In ..
74HC132D ,74HC/HCT132; Quad 2-input NAND Schmitt triggerPin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
74HC132N ,Quad 2-input NAND Schmitt triggerPin configuration DIP14, SO14 and (T)SSOP146.2 Pin description Table 2. Pin descriptionSymbol Pin D ..
74LV139DB ,Dual 2-to-4 line decoder/demultiplexerPIN CONFIGURATION PIN DESCRIPTIONPINV1 16 CC1E SYMBOL FUNCTIONNUMBER2 151A 2E01, 15 1E, 2E Enable i ..
74LV139PW ,Dual 2-to-4 line decoder/demultiplexerGeneral descriptionThe 74LV139 is a low-voltage Si-gate CMOS device that is pin and function compat ..
74LV14 ,Hex inverting Schmitt-trigger
74LV14D ,Hex inverting Schmitt-triggerLogic diagram for one Schmitt trigger74LV14 All information provided in this document is subject to ..
74LV14N ,Hex inverting Schmitt triggerINTEGRATED CIRCUITS74LV14Hex inverting Schmitt-triggerProduct specification 1998 Apr 20Supersedes d ..
74LV14PW ,Hex inverting Schmitt-triggerPIN CONFIGURATION LOGIC SYMBOL1A 114 V21 1A 1YCC1Y 213 6A3 2A 2Y 42A 3 12 6Y2Y 4 11 5A5 3A 3Y 63A 5 ..
74HC126D
Quad buffer/line driver; 3-state
Philips Semiconductors Product specification
Quad buffer/line driver; 3-state 74HC/HCT126
FEATURES Output capability: bus driver ICC category: MSI
GENERAL DESCRIPTIONThe 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The HC/HCT126 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by
the output enable input (nOE). A LOW at nOE causes the outputs to assume a HIGH impedance OFF-state.
The “126” is identical to the “125” but has active HIGH enable inputs.
QUICK REFERENCE DATAGND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
Notes CPD is used to determine the dynamic power dissipation (PDin μW): = CPD× VCC2×fi+∑ (CL× VCC2×fo) where: = input frequency in MHz = output frequency in MHz= output load capacitance in pF
VCC= supply voltage in V (CL× VCC2×fo) = sum of outputs For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC− 1.5 V
ORDERING INFORMATIONSee “74HC/HCT/HCU/HCMOS Logic Package Information”.
Philips Semiconductors Product specification
Quad buffer/line driver; 3-state 74HC/HCT126
PIN DESCRIPTION
FUNCTION TABLE
Note H = HIGH voltage level = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Philips Semiconductors Product specification
Quad buffer/line driver; 3-state 74HC/HCT126
DC CHARACTERISTICS FOR 74HCFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HCGND = 0 V; tr = tf = 6 ns; CL = 50 pF
Philips Semiconductors Product specification
Quad buffer/line driver; 3-state 74HC/HCT126
DC CHARACTERISTICS FOR 74HCTFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
Note to HCT typesThe value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications.
To determine ΔICC per unit, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCTGND = 0 V; tr = tf = 6 ns; CL = 50 pF
Philips Semiconductors Product specification
Quad buffer/line driver; 3-state 74HC/HCT126
AC WAVEFORMS
PACKAGE OUTLINESSee “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
