74HC125DB Fast Delivery |IC PHOENIX CO.,LIMITED

74HC125DB ,Quad buffer/line driver; 3-stateFEATURES• Output capability: bus driver• I category: MSICC
74HC125DB ,Quad buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC125DB ,Quad buffer/line driver; 3-stateFunctional description [1]Table 3. Function tableControl Input OutputnOE nA nYLLLHHHX Z[1] H = HIGH ..
74HC125N ,Quad buffer/line driver; 3-statePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnOE nA n ..
74HC125PW ,74HC/HCT125; Quad buffer/line driver; 3-statePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnOE nA n ..
74HC126D ,Quad buffer/line driver; 3-statePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnOE nA n ..
74LV123DB ,Dual retriggerable monostable multivibrator with resetINTEGRATED CIRCUITS74LV123Dual retriggerable monostablemultivibrator with resetProduct specificatio ..
74LV123PW ,Dual retriggerable monostable multivibrator with resetINTEGRATED CIRCUITS74LV123Dual retriggerable monostablemultivibrator with resetProduct specificatio ..
74LV125 ,Quad buffer/line driver (3-State)
74LV125 ,Quad buffer/line driver (3-State)
74LV125 ,Quad buffer/line driver (3-State)
74LV125 ,Quad buffer/line driver (3-State)

74HC125DB
Quad buffer/line driver; 3-state
1. General description
The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by
the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high
impedance OFF-state. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits Complies with JEDEC standard no. 7A Input levels: The 74HC125: CMOS levels The 74HCT125: TTL levels ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115-A exceeds 200V Multiple package options Specified from 40 C to +85 C and from 40 C to +125C
3. Ordering information
74HC125; 74HCT125
Quad buffer/line driver; 3-state
Rev. 4 — 10 January 2013 Product data sheet
Table 1. Ordering information
74HC125N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT125N
74HC125D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT125D
74HC125DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HCT125DB
74HC125PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
SOT402-1
74HCT125PW
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
4. Functional diagram
5. Pinning information
5.1 Pinning
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
5.2 Pin description
6. Functional description
[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z= high-impedance OFF-state.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60C.
Table 2. Pin description
1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 output enable input (active LOW)
1A, 2A, 3A, 4A 2, 5, 9, 12 data input , 2Y, 3Y, 4Y 3, 6, 8, 11 data output
GND 7 ground (0V)
VCC 14 supply voltage
Table 3. Function table[1]
LLL Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7 V
IIK input clamping current VI < 0.5 V or VI >VCC +0.5 V [1]- 20 mA
IOK output clamping current VO< 0.5 V or VO >VCC +0.5V [1]- 20 mA output current VO = 0.5 V to (VCC +0.5V) - 35 mA
ICC supply current - +70 mA
IGND ground current - 70 mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation [2]
DIP14 package - 750 mW
SO14 and (T)SSOP14
packages 500 mW
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0V)
VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 - VCC 0- VCC V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V
VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V
VCC = 6.0 V --83 - --ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
74HC125
VIH HIGH-level
input voltage
VCC= 2.0V 1.5 1.2 - 1.5 - 1.5 - V
VCC= 4.5V 3.15 2.4 - 3.15 - 3.15 - V
VCC= 6.0V 4.2 3.2 - 4.2 - 4.2 - V
VIL LOW-level
input voltage
VCC= 2.0V - 0.8 0.5 - 0.5 - 0.5 V
VCC= 4.5V - 2.1 1.35 - 1.35 - 1.35 V
VCC= 6.0V - 2.8 1.8 - 1.8 - 1.8 V
VOH HIGH-level
output voltage =VIHorVIL= 20 A; VCC= 2.0V 1.9 2.0 - 1.9 - 1.9 - V= 20 A; VCC= 4.5V 4.4 4.5 - 4.4 - 4.4 - V= 20 A; VCC= 6.0V 5.9 6.0 - 5.9 - 5.9 - V= 6.0 mA; VCC= 4.5V 3.98 4.32 - 3.84 - 3.7 - V= 7.8 mA; VCC= 6.0V 5.48 5.81 - 5.34 - 5.2 - V
VOL LOW-level
output voltage =VIHorVIL =20 A; VCC= 2.0V - 0 0.1 - 0.1 - 0.1 V =20 A; VCC= 4.5V - 0 0.1 - 0.1 - 0.1 V =20 A; VCC= 6.0V - 0 0.1 - 0.1 - 0.1 V= 6.0 mA; VCC= 4.5V - 0.15 0.26 - 0.33 - 0.4 V= 7.8 mA; VCC= 6.0V - 0.16 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND;
VCC =6.0V 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current =VIHor VIL; =VCCor GND;
VCC =6.0V 0.5 - 5.0 - 10.0 A
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
ICC supply current VI =VCCor GND; IO =0A;
VCC =6.0V - 8.0 - 80 - 160 A input
capacitance
-3.5 - pF
74HCT125
VIH HIGH-level
input voltage
VCC= 4.5 V to 5.5V 2.0 1.6 - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC= 4.5 V to 5.5V - 1.2 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage =VIHor VIL; VCC =4.5V= 20A 4.4 4.5 - 4.4 - 4.4 - V=6 mA 3.98 4.32 - 3.84 - 3.7 - V
VOL LOW-level
output voltage =VIHor VIL; VCC =4.5V =20A - 0 0.1 - 0.1 - 0.1 V= 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V input leakage
current =VCCor GND;
VCC =5.5V 0.1 - 1.0 - 1.0 A
IOZ OFF-state
output current =VIHor VIL; VCC =5.5V; =VCC or GND 0.5 - 5.0 - 10 A
ICC supply current VI =VCCor GND; IO =0A;
VCC =5.5V - 8.0 - 80 - 160 A
ICC additional
supply current
per input pin; =VCC 2.1 V; IO =0A;
other inputs at VCC or GND;
VCC= 4.5Vto 5.5V 100 360 - 450 - 490 A input
capacitance
-3.5 - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
10. Dynamic characteristicsTable 7. Dynamic characteristics
Voltages are referenced to GND (ground =0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure7.
For type 74HC125
tpd propagation
delay
nA to nY; see Figure5 [1]
VCC = 2.0 V - 30 100 - 125 - 150 ns
VCC = 4.5 V - 11 20 - 25 - 30 ns
VCC =5V; CL =15pF - 9 - - - - - ns
VCC = 6.0 V - 9 17 - 21 - 26 ns
ten enable time nOE to nY; see Figure6 [2]
VCC = 2.0 V - 41 125 - 155 - 190 ns
VCC = 4.5 V - 15 25 - 31 - 38 ns
VCC = 6.0 V - 12 21 - 26 - 32 ns
tdis disable time nOE to nY; see Figure6 [3]
VCC = 2.0 V - 41 125 - 155 - 190 ns
VCC = 4.5 V - 15 25 - 31 - 38 ns
VCC = 6.0 V - 12 21 - 26 - 32 ns transition
time
nY; see Figure5 [4]
VCC = 2.0 V - 14 60 - 75 - 90 ns
VCC = 4.5 V - 5 12 - 15 - 18 ns
VCC = 6.0 V - 4 10 - 13 - 15 ns
CPD power
dissipation
capacitance =50pF;f= 1 MHz; =GNDto VCC
[5] -22 - - - - - pF
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
[1] tpd is the same as tPLH and tPHL.
[2] ten is the same as tPZH and tPZL.
[3] tdis is the same as tPLZ and tPHZ.
[4] tt is the same as tTHL and tTLH.
[5] CPD is used to determine the dynamic power dissipation (PD in W). =CPD VCC2fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC = supply voltage in V;= number of inputs switching;
(CL VCC2fo)= sum of outputs.
11. Waveforms
For type 74HCT125
tpd propagation
delay
nA to nY; see Figure5 [1]
VCC = 4.5 V - 15 25 - 31 - 38 ns
VCC =5V; CL =15pF - 12 - - - - - ns
ten enable time nOE to nY; see Figure6 [2]
VCC = 4.5 V - 15 28 - 35 - 42 ns
tdis disable time nOE to nY; see Figure6 [3]
VCC = 4.5 V - 15 25 - 31 - 38 ns transition
time
nY; see Figure5 [4] - 5 12 - 15 - 18 ns
CPD power
dissipation
capacitance =50pF;f= 1 MHz; =GNDto VCC
[5] -24 - - - - - pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground =0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure7.
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
Table 8. Measurement points
74HC125 0.5VCC 0.5VCC
74HCT125 1.3V 1.3V
NXP Semiconductors 74HC125; 74HCT125
Quad buffer/line driver; 3-state
Table 9. Test data
74HC125 VCC 6ns 15pF, 50 pF 1k open GND VCC
74HCT125 3V 6ns 15 pF, 50 pF 1k open GND VCC

Partno	Mfg	Dc	Qty	Available	Descript
74HC125DB	NXP	N/a	1000	avai	Quad buffer/line driver; 3-state