74FR900SSC ,9-Bit / 3-Port Latchable Datapath MultiplexerFunctional DescriptionThe 74FR900 allows 9-bit data to be transferred from any TABLE 1. Datapath Co ..
74FR9244SPC ,9-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR9244 is a non-inverting 9-bit buffer and line driver 3-STATE outputs drive bus lin ..
74FST3125 ,4-Bit Bus Switch
74FST3125D ,4-Bit Bus SwitchFeaturesFST31251• R 4 TypicalONAWLYWWSOIC−14• Less Than 0.25 ns−Max Delay Through SwitchD SUFFI ..
74FST3125DR2 ,4-Bit Bus Switch
74FST3125DT ,4-Bit Bus Switch
74LS241 ,Octal 3-STATE Buffer/Line Driver/Line ReceiverFeaturesYTypical power dissipation (enabled)YTRI-STATE outputs drive bus lines directlyInverting 13 ..
74LS244 ,Octal 3-STATE Buffer/Line Driver/Line ReceiverFeaturesThese buffers/line drivers are designed to improve both the 3-STATE outputs drive bus line ..
74LS245 ,3-STATE Octal Bus TransceiverFeaturesThese octal bus transceivers are designed for asynchro- Bi-Directional bus transceiver in ..
74LS247 ,8CD-to-Seven-Segment Decoders/Drivers(with 15V outputs)3SN74LS247LS247FUNCTION TABLEDECIMALINPUTS OUTPUTSOR OR BI/RBO BI/RBO NOTE NOTEFUNCTIONLT RBI D C B ..
74LS249 , BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
74LS249 , BCD-TO-SEVEN-SEGMENT DECODERS/DRIVERS
74FR900SSC
9-Bit / 3-Port Latchable Datapath Multiplexer
74FR900 9-Bit, 3-Port Latchable Datapath Multiplexer May 1992 Revised August 1999 74FR900 9-Bit, 3-Port Latchable Datapath Multiplexer General Description Features The 74FR900 is a data bus multiplexer routing any of three � 9-bit data ports for systems carrying parity bits 9-bit ports to any other one of the three ports. Readback of � Readback capability for system self checks. data latched from any port onto itself is also possible. The � Independent control lines for maximum flexibility 74FR900 maintains separate control of all latch-enable, � Guaranteed multiple output switching and 250 pF load output enable and select inputs for maximum flexibility. delays PINV allows inversion of the data from the C to A or B 8 8 8 � Outputs optimized for dynamic bus drive capability path. This is useful for control of the parity bit in systems diagnostics. � PINV parity control facilitates system diagnostics Fairchild’s 74FR25900 includes 25Ω resistors in series with � FR25900 resistor option for driving MOS inputs such as port A and B outputs. Resistors minimize undershoot and DRAM arrays ringing which may damage or corrupt sensitive device inputs driven by these ports. Ordering Code: Order Number Package Number Package Description 74FR900SSC MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Description Pin Names Description Latch Enable Inputs LExx OE Output Enable Inputs x PINV Parity Invert Input S , S Select Inputs 0 1 A –A Port A Inputs or 3-STATE Outputs 0 8 B –B Port B Inputs or 3-STATE Outputs 0 8 C –C Port C Inputs or 3-STATE Outputs 0 8 © 1999 DS010990
